Programmable Paging Tone Decoder
CMX823
1.7.1 Electrical Performance (continued)
C-BUS Timings (See Figure 4 and Note 9)
Notes
Min.
100
100
0.0
–
Typ.
–
Max.
–
Unit
ns
ns
ns
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
tCSE
tCSH
tLOZ
tHIZ
CSN-Enable to Clock-High time
Last Clock-High to CSN-High time
Clock-Low to Reply Output enable time
CSN-High to Reply Output 3-state time
CSN-High Time between transactions
Inter-Byte Time
–
–
–
–
–
1.0
–
tCSOFF
tNXT
tCK
1.0
500
500
200
200
75
–
–
–
Clock-Cycle time
–
–
tCH
Serial Clock-High time
–
–
tCL
Serial Clock-Low time
–
–
tCDS
tCDH
tRDS
tRDH
Command Data Set-Up time
Command Data Hold time
Reply Data Set-Up time
–
–
25
–
–
75
–
–
Reply Data Hold time
0
–
–
Figure 4 C-BUS Timing
Notes: 5. Depending on the command, 1, 2 or 3 bytes of COMMAND DATA are transmitted to the
CMX823 MSB (Bit 7) first, LSB (Bit 0) last. REPLY DATA (1 or 2 bytes) is read from the
CMX823 MSB (Bit 7) first, LSB (Bit 0) last.
6. Data is clocked into and out of the peripheral on the rising edge of the SERIAL CLOCK.
7. Loaded commands are acted upon at the end of each command (i.e. when CSN goes high).
8. To allow for differing µController serial interface formats, C-BUS compatible ICs are able to
work with either polarity SERIAL CLOCK pulses.
9. These timings are for the latest version of the C-BUS, as embodied in the CMX823, and
allow faster transfers than the original C-BUS specification.
1.7.2 Packaging
ã 2003 CML Microsystems Plc
20
D/823/3
CMLMICRO [ CML MICROCIRCUITS ]
