Family Radio CTCSS 'Type 2' Encoder and Decoder
CMX808A
Write Only Register Description
GENERAL RESET (Hex address $01)
The reset command has no data attached to it. It sets the device registers to zero (all powersaved) with
the exception of Bits 2, 1 and 0 of the SUB-AUDIO STATUS register $81.
SUB-AUDIO CONTROL Register (Hex address $80)
This register is used to control the functions of the device as described below:
These two bits enable and disable the CTCSS decoder (Rx) or transmitter (Tx)
according to the table below:
CTCSS TX ENABLE
and DECODER
ENABLE
(Bits 7 and 6)
Tx
Rx
Function
Bit 7 Bit 6
0
0
1
1
0
1
0
1
Tx disabled, Rx disabled
Tx disabled, Rx enabled
Tx enabled, Rx disabled
Tx enabled, Rx enabled
These four bits set the bandwidth of the CTCSS tone decoder according to the
table below:
CTCSS DECODER
BANDWIDTH
(Bits 5, 4, 3 and 2)
BANDWIDTH
Bit 5 Bit 4 Bit 3 Bit 2
Will
Decode
±1.1%
±1.3%
±1.6%
±1.8%
±2.0%
±2.2%
±2.5%
±2.7%
Will Not
Decode
±2.4%
±2.7%
±2.9%
±3.2%
±3.5%
±3.7%
±4.0%
±4.2%
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Reserved for future use. This bit should be set to "0".
(Bit 1)
When this bit is set to "1" it enables the interrupt.
When this bit is set to "0" the interrupt is masked.
CTCSS IRQ MASK
(Bit 0)
AUDIO CONTROL Register (Hex address $82)
This register is used to control the functions of the device as described below:
Note: TX BPF ENABLE (Bit 7) and RX BPF ENABLE (Bit 6) should not be enabled at the same time.
When this bit is "1" the audio band-pass filter is enabled and the output of the
filter is switched to TX AUDIO OUT. The output is then controlled by BPF UN-
MUTE. See Bit 5 below.
TX BPF ENABLE
(Bit 7)
When this bit is “0” the audio band pass filter is disabled (powersaved) and the
output of the filter is disconnected from TX AUDIO OUT, which is then in a high
impedance state.
2003 CML Microsystems Plc
8
D/808A/6
CMLMICRO [ CML MICROCIRCUITS ]
