AIS Baseband IC with/without RF Synthesiser
CMX7032/CMX7042
Certain internal subsystems can be directly accessed and controlled via C-BUS transactions, without
issuing a specific task/command.
7.4.4 Timing and Synchronisation
An AIS transponder must keep track of both the current AIS slot number and the position within the slot.
This is principally to ensure that transmissions occur at the right time, and that hardware is correctly
switched between Rx and Tx, but is also useful for scheduling when to take RSSI measurements, when
receivers can be powered down and when they should wake up again.
In an AIS Class A transponder, the clock is synchronised with a 1Hz tick from a GNSS (GPS) unit. In a
Class B transponder the clock may be synchronised to the GNSS tick, or may be synchronised to the
reception time of AIS bursts from a Class A transponder or Base Station. Note that the latter scheme
requires management by the host µC, which must determine which received bursts are qualified to be
used as a timing reference. Whichever of these methods is used by the transponder, the
CMX7032/CMX7042 requires a Slot Clock (SLOTCLK) input from the host µC. This should be a pulse at
least 50µs long, whose rising edge is aligned to the AIS Slot boundary. An edge is required at the start of
every AIS slot, hence the frequency of this signal is 37.5Hz.
The CMX7032/CMX7042 has several features to assist the host µC with timing, which are detailed below.
All of these features are based on the SLOTCLK signal, provided by the host to the CMX7032/CMX7042’s
SLOTCLK pin. All timings are defined as a number of 24kHz “ticks” referenced to the rising edge of the
SLOTCLK signal.
7.4.5 Time of Arrival Reporting
When the CMX7032/CMX7042 has received a burst as the result of an RXB1/2 (receive burst) task, the
time of arrival is presented as one of the first four words of the Data Block. This will give the time,
measured in 24kHz ticks, between the rising edge of the last SLOTCLK and the detection of the last bit of
the start flag of the burst (Tsync in ITU-R M.1371-3). The current Slot Number (as determined by the
internal slot counter) will also be returned in the Data Block. Note that the internal filters and signal
processing results in a delay of up to 20 ticks – this can be automatically removed by the use of the Config
Mode task, ToA compensate. For a received burst from a Class A Transmitter that is exactly aligned with
the SLOTCLK, the ToA indicated will be calculated as:
AIS data field
Tx rise time
Preamble
Start flag
bits
8
24
8
ticks
20
60
20
Internal delay
Total
20
120
Note that additional delays due to signal processing through external hardware may add to this value.
The internal slot counter increments on every rising edge of the SLOTCLK, or when then the internal tick
counter reaches 640. This is not subject to the internal filter delays. The internal tick counter is initialized
on every rising edge of SLOTCLK. In the absence of a SLOTCLK signal, it will free-run, based on the
internal 24kHz clock, modulo 640.The internal SLOTCLK is output as a pulse on the SLOTCLKOP pin.
7.4.6 Tx Timing
The CMX7032/CMX7042 can be configured to perform a sequence of events when a TXB or TDBS task
(transmit burst) is issued. The events are: start and end of modulation, ramping the RAMDAC up and
down, asserting and releasing a digital output pin (intended as a Tx Enable) and CSTDMA sensing. Each
of these can be configured to happen with specified delays from the rising edge of the SLOTCLK. The
timings are set up with the Config Mode task Tx_Sequence. See User Manual section 9.19.2.7 for details.
2012 CML Microsystems Plc
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CMLMICRO [ CML MICROCIRCUITS ]
