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CMX608 参数 Datasheet PDF下载

CMX608图片预览
型号: CMX608
PDF下载: 下载PDF文件 查看货源
内容描述: [Integrated Input and Output Channel Filters]
分类和应用:
文件页数/大小: 70 页 / 3411 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
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RALCWI Vocoder  
CMX608/CMX618/CMX638  
Bit 2 and 3  
PERIOD  
These two bits control the period/frequency of the sync pulse output from SYNC  
pin 25, when it is set to produce sync pulses.  
Bit 3  
Bit 2  
Description  
0
0
1
1
0
1
0
1
8kHz square wave  
Pulse every 20ms  
Pulse every 40ms  
Pulse every 60ms  
Bits 4 to 7  
These bits are unused and should be cleared to '0'.  
5.10.2.  
8 Bit Write-Only Registers  
AIG register address $05 (CMX618/CMX638 only. No function on CMX608.)  
7
6
0
5
0
4
0
3
2
1
0
INPUT GAIN SWITCH  
INPUT GAIN  
This is the analogue input gain control register. Because the amplitude of speech fluctuates, it is  
important to set the average speech level such that the level of distortion that results from the  
occasional overdriving of the inputs is at an acceptable level. The ADC is designed not to saturate,  
but will clip input signals which are too large. The ADC is a sigma-delta design with a sampling  
frequency of 2.4MHz and subsequent decimation by a factor of 300.  
Bits 0 to 3  
These bits control the input gain stage according to the following table:  
INPUT GAIN  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
Gain (dB)  
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0 (default)  
1.5  
3.0  
4.5  
6.0  
7.5  
9.0  
10.5  
12.0  
13.5  
15.0  
16.5  
18.0  
19.5  
21.0  
22.5  
Bits 4 to 6  
These bits are unused and should be cleared to '0'  
Bit 7  
INPUT  
GAIN  
A '0' in this bit sets the microphone amplifier gain to 0dB. A '1' in this bit sets the  
microphone amplifier gain to +20dB. Using this switch will achieve a better noise  
performance than using an equivalent gain setting in bits 0-3.  
SWITCH  
2014 CML Microsystems Plc  
33  
D/608_18_38/11  
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