GMSK Modem
CMX589A
Pin No.
E2/D5/
D2/P4
16
17
Signal
Type
Description
Tx Out
Tx Enable
O/P
I/P
Gaussian filtered Tx output signal. In powersave mode the Tx Out pin
is high impedance.
A logic ‘1’ applied to this input, enables the transmit data path, through
the Tx Filter to the Tx Out pin. A logic ‘0’ will place the Tx Out pin to
V
BIAS
via a high impedance.
A logic ‘1’ applied to this input will powersave all transmit circuits except
for the Tx Clock.
The logic level input for the data to be transmitted. This data should be
synchronous with Tx CLK.
A logic level output carrying the received data, synchronous with
Rx CLK.
A logic level clock output at the received data bit-rate.
A logic level clock output at the transmit data bit-rate.
A logic level output which may be used as an indication of the quality of
the received signal.
Positive supply. Levels and voltages within the device are dependent
upon this supply. This pin should be bypassed to V
SS
by a capacitor
mounted close to the pin.
Table 1: Signal List
18
19
20
21
22
23
24
Tx PSAVE
Tx Data
Rx Data
Rx CLK
Tx CLK
Rx S/N
V
DD
I/P
I/P
O/P
O/P
O/P
O/P
power
©
2002 CML Microsystems Plc
5
D/589A/4
CMLMICRO [ CML MICROCIRCUITS ]
