CPC7591
Make-Before-Break Ringing to Talk Transition Logic Sequence
Ringing
Return
Switch
(SW3)
Ringing
Switch
(SW4)
Break
Switches
IN
T
SD
State
Latch
Timing
RINGING
Ringing
1
-
Off
On
Off
Off
On
On
Off
SW4 waiting for next zero-current crossing to
turn off. Maximum time is one-half of the ringing
cycle. In this transition state, current that is
limited to the dc break switch current limit value
will be sourced from the ring node of the SLIC.
Make-
Before-
Break
0
0
0
Z
On
On
Talk
Zero-cross current has occurred
2.3.4 Break-Before-Make Operation
Break-before-make ringing switch release timing is
performed via the bidirectional T interface. As an
the ringing cycle period to allow sufficient time for
a zero crossing current event to occur and for the
circuit to enter the break before make state.
SD
input, the T can disable all of the CPC7591 switches
SD
3. During the T low period, clear the IN
SD
RINGING
when pulled to a logic low. Although logically disabled,
an active (closed) ringing switch (SW4) will remain
closed until the next current zero crossing event. This
operational sequence is shown below in the
“Break-Before-Make Ringing to Talk Transition Logic
Sequence” on page 12.
input for the talk state (logic low).
4. Release T allowing the internal pull-up to
SD
activate the break switches.
When using T as an input, the two recommended
SD
states are “0” which overrides the logic input pins and
forces an all-off state and “Z” which allows normal
switch control via the logic input pins. This requires the
use of an open-collector or open-drain type buffer.
1. Pull T to a logic low to end the ringing state.
SD
This opens the ringing return switch (SW3) and
prevents any other switches from closing.
2. Keep T low for at least one-half the duration of
SD
Break-Before-Make Ringing to Talk Transition Logic Sequence
Ringing
Return
Switch
(SW3)
Ringing
Switch
(SW4)
Break
Switches
IN
T
SD
State
Latch
Timing
RINGING
Ringing
All-off
1
1
Z
0
Z
-
Off
Off
On
Off
On
On
Hold this state for one-half of the ringing cycle.
SW4 waiting for zero current to turn off.
0
All-off
Talk
0
0
Zero current has occurred. SW4 has opened
Close break switches
Off
On
Off
Off
Off
Off
Logic states and explanations are provided in the “Truth Table” on page 9.
2.4 Data Latch
The CPC7591 has an integrated transparent data
latch. The latch enable operation is controlled by TTL
logic input levels at the LATCH pin. Data input to the
When the LATCH enable control pin is at logic 0 the
data latch is transparent and the IN input data
RINGING
control signal flows directly through the data latch to
the state control circuitry. A change in IN input
latch is via the input pin IN
, while the output of
RINGING
RINGING
the data latch are internal nodes used for state control.
will be reflected by a change in switch state.
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