EP9312
Universal Platform SOC Processor
DMARQ
(device)
tLI
tMLI
DMACKn
(host)
tLI
tSS
tACK
STOP
(host)
tLI
tIORDYZ
DDMARDYn
(device)
tACK
HSTROBE
(host)
tDVS
tDVH
DD (15:0)
CRC
(host)
IDEDA[2:0]
tACK
IDECS0n,
IDECS1n
Note: The definitions for the DIOWn:STOP, IORDY:DDMARDYn:DSTROBE and DIORn:HDMARDYn:HSTROBE signal lines are no
longer in effect after DMARQ and DMACKn are negated.
Figure 27. Host Terminating an Ultra DMA data-out Burst
DS515PP7
©Copyright 2005 Cirrus Logic (All Rights Reserved)
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