CS8900A
Crystal LAN™ ISA Ethernet Controller
4.4.11 Register 9: Transmit Command Status
(TxCMD, Read-only, Address: PacketPage base + 0108h)
7
6
5
4
3
2
1
0
TxStart
001001
F
E
D
C
B
A
9
8
TxPadDis
InhibitCRC
Onecoll
Force
This register contains the latest transmit command which tells the CS8900A how the next packet should be sent.
The command must be written to PacketPage base + 0144h in order to initiate a transmission. The host can read
the command from register 9 (PacketPage base + 0108h). See Section 5.7 on page 99.
001001
These bits provide an internal address used by the CS8900A to identify this as the Transmit
Command Register. When reading this register, these bits will be 001001, where the LSB cor-
responds to Bit 0.
TxStart
This pair of bits determines how many bytes are transferred to the CS8900A before the MAC
starts the packet transmit process.
Bit 7 Bit 6
0
0
1
1
0
1
0
Start transmission after 5 bytes are in the CS8900A
Start transmission after 381 bytes are in the CS8900A
Start transmission after 1021 bytes are in the CS8900A
Start transmission after the entire frame is in the CS8900A
1
Force
When set in conjunction with a new transmit command, any transmit frames waiting in the trans-
mit buffer are deleted. If a previous packet has started transmission, that packet is terminated
within 64 bit times with a bad CRC.
Onecoll
When this bit is set, any transmission will be terminated after only one collision. When clear, the
CS8900A allows up to 16 normal collisions before terminating the transmission.
InhibitCRC
TxPadDis
When set, the CRC is not appended to the transmission.
When TxPadDis is clear, if the host gives a transmit length less than 60 bytes and InhibitCRC
is set, then the CS8900A pads to 60 bytes. If the host gives a transmit length less than 60 bytes
and InhibitCRC is clear, then the CS8900A pads to 60 bytes and appends the CRC.
When TxPadDis is set, the CS8900A allows the transmission of runt frames (a frame less than
64 bytes). If InhibitCRC is clear, the CS8900A appends the CRC. If InhibitCRC is set, the
CS8900A does not append the CRC
After reset, if no EEPROM is found by the CS8900A, then the register has the following initial state. If an EEPROM
is found, then the register’s initial value may be set by the EEPROM. See Section 3.3 on page 19.
Regster value is: 0000 0000 0000 1001
Notes: The CS8900A does not transmit a frame if TxLength < 3
CIRRUS LOGIC PRODUCT DATA SHEET
58
DS271PP3
CIRRUS [ CIRRUS LOGIC ]
