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CS5460A-BS 参数 Datasheet PDF下载

CS5460A-BS图片预览
型号: CS5460A-BS
PDF下载: 下载PDF文件 查看货源
内容描述: 单相双向功率/电能IC [Single Phase Bi-Directional Power/Energy IC]
分类和应用:
文件页数/大小: 54 页 / 879 K
品牌: CIRRUS [ CIRRUS LOGIC ]
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CS5460A  
or custom calibration board. When the metering  
system is installed, the calibrator would be used to  
control calibration and/or to program user-speci-  
fied commands and calibration values into the EE-  
PROM. The commands/data will determine the  
CS5460A’s exact operation, when the auto-boot  
initialization sequence is running. Any of the valid  
commands can be used.  
Register.  
4C 00 00 14  
74 00 00 04  
E8  
;Set Pulse Rate Register to  
0.625 Hz.  
;Unmask bit #2 (“LSD” bit in  
the Mask Register).  
;Start performing continuous  
computation cycles.  
78 00 01 40  
;Write STOP bit to Control  
Register, to terminate au-  
3.3.2 Auto-Boot Data for EEPROM  
This section illustrates what a typical set of code  
would look like for an auto-boot sequence. This  
code is what would be written into the EEPROM. In  
the sequence below, the EEPROM is programmed  
so that it will first send out commands that write cal-  
ibration values to the calibration registers inside  
the CS5460A. This is followed by the commands  
used to set (write) the desired Pulse-Rate Register  
value, and also to un-mask the ‘LSD’ status bit in  
the Mask Register. Finally, the EEPROM code will  
initiate ‘continuous computation cycles’ data acqui-  
sition mode and select one of the alternate  
pulse-output formats (e.g., set the MECH bit in the  
Control Register). The serial data for such a se-  
quence is shown below in single-byte hexidecimal  
notation:  
to-boot  
initialization  
se-  
quence, and also set the  
EOUT pulse output to Me-  
chanical Counter Format.  
This data from the EEPROM will drive the SDI pin  
of the CS5460A during the auto-boot sequence.  
The following sequence of events will cause the  
CS5460A to execute the auto-boot mode initializa-  
tion sequence: (A simple timing diagram for this se-  
quence is shown below in Figure 14.) If the MODE  
pin is set to logic high (or if the MODE pin was  
set/tied to logic high during/after the CS5460A has  
been powered on), then changing the RESET pin  
from active state to inactive state (low to high) will  
cause the CS5460A to drive the CS pin low, and af-  
ter this, to issue the standard EEPROM block-read  
command on the CS5460A’s SDO line. Once these  
events have completed, the CS5460A will continue  
to issue SCLK pulses, to accept data/commands  
from the EEPROM. The serial port will become a  
master-mode interface. For a more detailed timing  
diagram, see SWITCHING CHARACTERISTICS (in  
Section 1.)  
40 00 00 61  
44 7F C4 A9  
46 7F B2 53  
;Write to Configuration Regis-  
ter, turn high-pass filters on,  
set K = 1.  
;Write value of 0x7FC4A9 to  
Current Channel Gain Regis-  
ter.  
;Write value of 0x7FB253 to  
Voltage Channel DC Offset  
MODE  
RES  
CS  
EE Read  
Address 0  
SCLK  
SDO  
SDI  
5460A  
Commands  
Stop  
Figure 14. Timing Diagram for Auto-Boot Sequence  
25