CS49300 Family DSP
Number of Pages
Required
IBA Code(s)
Stored in Host Type of Design
ROM Content
CS493254
Image Size
N/A, All IBA codes are loaded
using Host Boot technique
N/A, All IBA codes
are loaded using
Host Boot technique Host Boot technique
N/A, All IBA codes Dolby Digital with Dolby Digital with
are loaded using
PL II,
Pro Logic II 5.1
Channel System
C.O.S.
Dolby Digital with PLII +
Cinema Re-EQ,
HDCD
32 + 32 = 64 Kbytes
2
C.O.S.
Enhanced
Dolby Digital with
Pro Logic II 5.1
Channel System
CS493264
N/A, All IBA codes are loaded
using Host Boot technique
N/A, All IBA codes
are loaded using
Host Boot technique Host Boot technique
N/A, All IBA codes Dolby Digital with
Enhanced
Dolby Digital/
DTS 5.1 Channel
System
are loaded using
PL II,
C.O.S., DTS
Dolby Digital with C.E.S., MPEG
Multichannel with C.E.S., DTS
with C.E.S., MP3
32 * 4 pages =
128 Kbytes
4
4
8
C.O.S.
C.O.S.
C.O.S.
Basic 6.1
Channel System
Dolby Digital with PLII with
C.E.S., MPEG Multichannel with
PLII, DTS-ES, DTS Neo:6
32 * 4 pages =
128 Kbytes
Enhanced 6.1
Channel System
Dolby Digital with PLII with
C.E.S., MPEG Multichannel with
PLII, DTS-ES with PLII, DTS
Neo:6, HDCD, LOGIC7, MP3,
Virtual Dolby Digital with VMAx
VirtualTheater
32 * 8 =
256 Kbytes
Premium
6.1/7.1 Channel
System
CS493292
Dolby Digital with PLII with
C.E.S., MPEG Multichannel with
PLII, DTS-ES, DTS Neo:6,
HDCD, SRS Circle Surround II,
C.O.S., MPEG-2: AAC
32 * 8 =
256 Kbytes
8
N/A, No IBA
Codes not avail- Channel System
Premium 6.1/7.1
able for the
CS493292
with AAC
Support
Table 12. Memory Requirements for Example 5.1, 6.1 and 7.1 Channel Systems
require external SRAM. Please refer to the
8.7. External Memory Examples
CS4932X/CS49330 Part Matrix vs. Code Matrix
for more detail about each particular application
code.
8.7.1. Non-Paged Autoboot Memory
The most rudimentary memory design discussed
above is the non-paged memory. In a non-paged
design, the DSP can only access one item in
memory which could be either a single full
download code load. The memory image given in
Figure 40 is an example of a non-paged memory
image.
The speed of external ROM or Flash Memory need
only be 330nS (or faster) which stores the
application codes, while the speed of the SRAM
must be 70nS or faster.
Only 15 of the 16 output bits of the address latches
would be connected to address bits A0-A14 of the
DS339PP4
63
CIRRUS [ CIRRUS LOGIC ]
