CS4297A
CS4297A
4.17 AC Mode Control Register (Index 5Eh)
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
0
0
0
DDM AMAP
0
SM1 SM0
0
0
0
0
DDM
DAC Direct Mode. This bit controls the source to the line and alternate line output drivers. When
‘set’, the L/R DACs directly drive the line and alternate line outputs by bypassing the audio mix-
er. When ‘clear’, the audio mixer is the source for the line and alternate line outputs.
AMAP
Audio Slot Mapping. This read/write bit controls whether the CS4297A responds to the Codec
ID based slot mapping as outlined in the AC ’97 2.1 specification. The bit is shadowed in the
Extended Audio ID Register (Index 28h). Refer to Table 7 for the slot mapping configurations.
SM[1:0]
Default
Slot Map. The SM[1:0] bits define the Slot Mapping for the CS4297A when the AMAP bit is
‘cleared’. Refer to Table 7 for the slot mapping configurations.
0080h
Codec ID Slot Map
ID1 ID0 SM1 SM0
Slot Assignments
Slot
Assignment
Mode
DAC,
ADC
AMAP
SPDIF
L
3
3
7
6
3
5
7
9
R
4
L
3
3
7
6
3
5
7
9
R
4
AMAP Mode 0
AMAP Mode 1
AMAP Mode 2
AMAP Mode 3
0
0
0
1
X
X
X
X
0
0
1
1
X
X
X
X
0
1
0
1
1
1
1
1
0
0
0
0
4
4
1
0
8
8
1
1
9
9
Slot Map Mode 0
Slot Map Mode 1
Slot Map Mode 2
Slot Map Mode 3
X
X
X
X
X
X
X
X
4
4
6
6
8
8
10
10
Table 7. Slot Mapping
4.18 Misc. Crystal Control Register (Index 60h)
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
Reserved
0
0
Reserved
0
Reserved
LOSM
LOSM
Loss of SYNC Mute Enable. The LOSM bit controls the loss of SYNC mute function. If this bit
is ‘set’, the CS4297A will mute all analog outputs for the duration of loss of SYNC. If this bit
is ‘cleared’, the mixer will continue to function normally during loss of SYNC. The CS4297A
expects to sample SYNC ‘high’ for 16 consecutive BIT_CLK periods and then ‘low’ for 240
consecutive BIT_CLK periods, otherwise loss of SYNC becomes true.
Default
0023h
DS318PP6
29
29
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