CS4297A
CS4297A
4.1
Reset Register (Index 00h)
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
SE4
SE3
SE2
SE1
SE0
0
ID8
ID7
0
0
ID4
0
0
0
0
SE[4:0]
ID8
Crystal 3D Stereo Enhancement. SE[4:0] = 00110, indicating this feature is present.
18-bit ADC Resolution. The ID8 bit is ‘set’, indicating this feature is present.
20-bit DAC resolution. The ID7 bit is ‘set’, indicating this feature is present.
Headphone Output (Alt Line Out). The ID4 bit is ‘set’, indicating this feature is present.
1990h. The data in this register is read-only data.
ID7
ID4
Default
Any write to this register causes a Register Reset to the default state of the audio (Index 00h - 38h) and vendor spe-
cific (Index 5Ah - 7Ah) registers. A read from this register returns configuration information about the CS4297A.
4.2
Master Volume Register (Index 02h)
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Mute
0
ML5
ML4
ML3
ML2
ML1
ML0
0
0
MR5 MR4 MR3 MR2 MR1 MR0
Mute
Master Mute. Setting this bit mutes the LINE_OUT_L/R output signals.
ML[5:0]
Master Volume Left. These bits control the left master output volume. Each step corresponds
to 1.5 dB gain adjustment, with 00000 = 0 dB. The total range is 0 dB to -94.5 dB attenuation.
MR[5:0]
Default
Master Volume Right. These bits control the right master output volume. Each step corresponds
to 1.5 dB gain adjustment, with 00000 = 0 dB. The total range is 0 dB to -94.5 dB attenuation.
8000h. This value corresponds to 0 dB attenuation and Mute ‘set’.
20
20
DS318PP6
CIRRUS [ CIRRUS LOGIC ]
