AUX_SCLK
AUX_SDIN
16 Auxiliary Serial Clock (Output) - Serial clock for the Auxiliary serial audio interface.
17 Auxiliary Serial Input (Input) - The CS42438 provides an additional serial input for two’s comple-
ment serial audio data.
AOUT1 +,-
AOUT2 +,-
AOUT3 +,-
AOUT4 +,-
AOUT5 +,-
AOUT6 +,-
20,19 Differential Analog Output (Output) - The full-scale differential analog output level is specified in
21,22 the Analog Characteristics specification table. Each positive leg of the differential outputs may also
24,23 be used single-ended.
25,26
28,27
29,30
AGND
VQ
35,48 Analog Ground (Input) -
36 Quiescent Voltage (Output) - Filter connection for internal quiescent reference voltage.
37,46 Analog Power (Input) - Positive power supply for the analog section.
VA
AIN1 +,-
AIN2 +,-
AIN3 +,-
AIN4 +,-
AIN5 +,-
AIN6 +,-
39,38 Differential Analog Input (Input) - Signals are presented differentially to the delta-sigma modula-
41,40 tors. The full-scale input level is specified in the Analog Characteristics specification table. Single-
43,42 ended inputs may be applied to the positive terminals when the ADCx SINGLE bit is enabled.
45,44 Once in Single-Ended Mode, the negative terminal of AIN1-AIN4 must be externally driven to com-
50,49 mon mode. See below for a description of AIN5-AIN6 in Single-Ended Mode.
52,51
AIN5 A,B
AIN6 A,B
50,49 Single-Ended Analog Input (Input) - In Single-Ended Mode, an internal analog mux allows selec-
52,51 tion between 2 channels for both analog inputs AIN5 and AIN6 (see section 7.6.6-7.6.8 for details).
The unused leg of each input is internally connected to common mode. The full-scale input level is
specified in the Analog Characteristics specification table.
FILT+
47 Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling cir-
cuits.
1.1
Digital I/O Pin Characteristics
Various pins on the CS42438 are powered from separate power supply rails. The logic level for each input
should adhere to the corresponding power rail and should not exceed the maximum ratings.
Power
Rail
VLC
Pin Name
SW/(HW)
RST
I/O
Driver
Receiver
Input
Input
-
-
1.8 V - 5.0 V, CMOS
1.8 V - 5.0 V, CMOS, with Hysteresis
SCL/CCLK
(AIN5_MUX)
SDA/CDOUT
(AIN6_MUX) Output
AD0/CS
(MFREQ)
Input/
1.8 V - 5.0 V, CMOS/Open Drain
1.8 V - 5.0 V, CMOS, with Hysteresis
1.8 V - 5.0 V, CMOS
Input
Input
-
-
AD1/CDIN
(ADC3_HPF)
1.8 V - 5.0 V, CMOS
VLS
MCLK
LRCK
SCLK
Input
Input
Input
-
-
-
1.8 V - 5.0 V, CMOS
1.8 V - 5.0 V, CMOS
1.8 V - 5.0 V, CMOS
-
ADC_SDOUT Input/
(ADC3_SINGLE) Output
1.8 V - 5.0 V, CMOS
DAC_SDIN
AUX_LRCK
AUX_SCLK
AUX_SDIN
Input
Output
Output
Input
-
1.8 V - 5.0 V, CMOS
1.8 V - 5.0 V, CMOS
1.8 V - 5.0 V, CMOS
-
-
-
1.8 V - 5.0 V, CMOS
Table 1. I/O Power Rails
DS646PP2
7
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