CS4225
SWITCHING CHARACTERISTICS - CONTROL PORT
o
(T = 25 C; VD+, VA+ = 5V±10%;Inputs: logic 0 = DGND, logic 1 = VD+, C = 20pF)
A
L
Parameter
Symbol
Min
Max
Units
2
®
I C Mode (H/S = floating)
Note 10
SCL Clock Frequency
f
0
100
kHz
µs
µs
µs
µs
µs
µs
ns
µs
ns
µs
scl
Bus Free Time Between Transmissions
Start Condition Hold Time (prior to first clock pulse)
Clock Low Time
t
4.7
4.0
4.7
4.0
4.7
0
buf
t
hdst
t
low
high
sust
Clock High Time
t
t
Setup Time for Repeated Start Condition
SDA Hold Time from SCL Falling
SDA Setup Time to SCL Rising
Rise Time of Both SDA and SCL Lines
Fall Time of Both SDA and SCL Lines
Setup Time for Stop Condition
Note 11
t
hdd
t
250
sud
t
1
r
t
300
f
t
4.7
susp
2
®
Notes: 10. Use of the I C bus interface requires a license from Philips.
2
®
I C is a registered trademark of Philips Semiconductors.
11. Data must be held for sufficient time to bridge the 300ns transition time of SCL.
Repeated
Start
Stop
Start
Stop
SDA
SCL
t
t
t
t
t
buf
t
high
hdst
f
susp
hdst
t
t
t
t
t
sust
sud
r
low
hdd
DS86PP8
7
CIRRUS [ CIRRUS LOGIC ]
