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CS4202-JQ 参数 Datasheet PDF下载

CS4202-JQ图片预览
型号: CS4202-JQ
PDF下载: 下载PDF文件 查看货源
内容描述: 音频编解码器97耳机放大器 [Audio Codec 97 with headphone Amplifier]
分类和应用: 解码器编解码器放大器
文件页数/大小: 68 页 / 1189 K
品牌: CIRRUS [ CIRRUS LOGIC ]
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CS4202  
2. GENERAL DESCRIPTION  
2.1  
AC-Link  
The CS4202 is a mixed-signal serial audio codec  
with integrated headphone power amplifier com-  
pliant with the Intel® Audio Codec ’97 Specifica-  
tion, revision 2.2 [6] (referred to as AC ’97). It is  
designed to be paired with a digital controller, typ-  
ically located on the PCI bus or integrated within  
the system core logic chip set. The controller is re-  
sponsible for all communications between the  
CS4202 and the remainder of the system. The  
CS4202 contains two distinct functional sections:  
digital and analog. The digital section includes the  
AC-link interface, S/PDIF interface, serial data  
port, GPIO, power management support, and Sam-  
ple Rate Converters (SRCs). The analog section in-  
cludes the analog input multiplexer (mux), stereo  
input mixer, stereo output mixer, mono output mix-  
er, headphone amplifier, stereo Analog-to-Digital  
Converters (ADCs), stereo Digital-to-Analog Con-  
verters (DACs), and their associated volume con-  
trols.  
All communication with the CS4202 is established  
with a 5-wire digital interface to the controller  
called the AC-link. This interface is shown in  
Figure 7. All clocking for the serial communication  
is synchronous to the BIT_CLK signal. BIT_CLK  
is generated by the primary audio codec and is used  
to clock the controller and any secondary audio co-  
decs. Both input and output AC-link audio frames  
are organized as a sequence of 256 serial bits form-  
ing 13 groups referred to as ‘slots’. During each au-  
dio frame, data is passed bi-directionally between  
the CS4202 and the controller. The input frame is  
driven from the CS4202 on the SDATA_IN line.  
The output frame is driven from the controller on  
the SDATA_OUT line. The controller is also re-  
sponsible for issuing reset commands via the RE-  
SET# signal. Following a Cold Reset, the CS4202  
is responsible for notifying the controller that it is  
ready for operation after synchronizing its internal  
functions. The CS4202 AC-link signals must use  
the same digital supply voltage as the controller, ei-  
ther +5 V or +3.3 V. See Section 3, AC-Link Frame  
Definition, for detailed AC-link information.  
AC'97  
CODEC  
Digital AC'97  
Controller  
SYNC  
BIT_CLK  
SDATA_OUT  
SDATA_IN  
RESET#  
Figure 7. AC-link Connections  
12  
DS549PP1