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CS2100CP-CZZ 参数 Datasheet PDF下载

CS2100CP-CZZ图片预览
型号: CS2100CP-CZZ
PDF下载: 下载PDF文件 查看货源
内容描述: 小数N分频时钟乘法器 [Fractional-N Clock Multiplier]
分类和应用: 时钟
文件页数/大小: 32 页 / 270 K
品牌: CIRRUS [ CIRRUS LOGIC ]
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CS2100-CP  
6.3  
Memory Address Pointer  
The Memory Address Pointer (MAP) byte comes after the address byte and selects the register to be read  
or written. Refer to the pseudocode above for implementation details.  
6.3.1  
Map Auto Increment  
The device has MAP auto increment capability enabled by the INCR bit (the MSB) of the MAP. If INCR is  
set to 0, MAP will stay constant for successive I²C writes or reads and SPI writes. If INCR is set to 1, MAP  
will auto increment after each byte is read or written, allowing block reads or writes of successive regis-  
ters.  
7. REGISTER QUICK REFERENCE  
This table shows the register and bit names with their associated default values.  
EnDevCfg1 and EnDevCfg2 bits must be set to 1 for normal operation.  
WARNING: All “Reserved” registers must maintain their default state to ensure proper functional operation.  
Adr  
01h  
Name  
Device ID  
7
Device4  
0
6
5
4
3
2
1
0
Device3  
Device2  
Device1  
Device0  
Revision2  
Revision1 Revision0  
p 25  
02h  
0
Reserved  
x
0
Reserved  
x
0
Reserved  
0
0
Reserved  
0
x
Reserved  
0
x
x
Device Ctrl  
Unlock  
x
AuxOutDis ClkOutDis  
p 25  
03h  
0
0
Device Cfg 1 RModSel2 RModSel1 RModSel0 Reserved  
Reserved AuxOutSrc1 AuxOutSrc0 EnDevCfg1  
p 26  
05h  
0
0
Reserved  
0
0
Reserved  
0
0
Reserved  
0
0
Freeze  
0
0
Reserved  
0
0
0
Global Cfg  
Reserved  
0
Reserved EnDevCfg2  
p 27  
0
0
MSB-7  
MSB-15  
LSB+8  
LSB  
MSB  
...........................................................................................................................  
...........................................................................................................................  
...........................................................................................................................  
...........................................................................................................................  
06h  
-
09h  
MSB-8  
LSB+15  
LSB+7  
32-Bit Ratio  
16h  
p 28  
17h  
Funct Cfg 1  
Funct Cfg 2  
Funct Cfg 3  
ClkSkipEn AuxLockCfg Reserved RefClkDiv1 RefClkDiv0 Reserved  
Reserved  
Reserved  
0
0
Reserved  
0
0
Reserved  
0
0
0
0
0
0
Reserved ClkOutUnl LFRatioCfg Reserved  
Reserved  
Reserved  
0
p 29  
1Eh  
p 29  
0
0
0
0
Reserved  
0
0
Reserved  
0
Reserved ClkIn_BW2 ClkIn_BW1 ClkIn_BW0 Reserved  
Reserved  
0
0
0
0
0
0
24  
DS840F1