CobraNet Hardware User’s Manual
Pinout and Signal Descriptions
4.1.2 CM-2 Connector Pinout
Table 1 lists the pinout for the four pinout connectors on the CM-2 board (J1-J4). The
interfaces for these signals are expanded following the table.
Table 2. CM-2 Pin Assignments
Conn.
Pin #
Pin Name
Conn.
Pin #
Pin Name
Conn.
Pin #
Pin Name
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
A1
UART_RXD
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
J1/J2
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
B8
GND
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
J3/J4
A15
DAI1_DATA3
RSVD3
A2
UART_TX_OE
HACK
B9
VCC_+3.3V
GND
A16
A17
A18
A19
A20
B1
A3
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
A1
WATCHDOG
RSVD4
A4
HR/W
VCC_+3.3V
GND
A5
HDS
AUX_POWER2
AUX_POWER0
GND
A6
HREQ
VCC_+3.3V
GND
A7
HEN
A8
HADDR0
HADDR1
HADDR2
HDATA0
HDATA1
HDATA2
HDATA3
HDATA4
HDATA5
HDATA6
HRESET
HDATA7
HADDR3
UART_TXD
GND
VCC_+3.3V
GND
B2
VCC_+3.3V
GND
A9
B3
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
B1
VCC_+3.3V
RSVD1
B4
VCC_+3.3V
GND
B5
GND
B6
VCC_+3.3V
GND
VCC_+3.3V
RSVD2
B7
B8
VCC_+3.3V
GND
A2
MUTE
B9
A3
FS1
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
VCC_+3.3V
GND
A4
MCLK_OUT
MCLK_IN
REFCLK_IN
DAO1_SCLK/DAI1_SCLK
DAO1_DATA0
DAO1_DATA1
DAO1_DATA2
DAO1_DATA3
DAI1_DATA0
DAI1_DATA1
DAI1_DATA2
A5
VCC_+3.3V
GND
A6
A7
VCC_+3.3V
GND
A8
B2
A9
GND
B3
VCC_+3.3V
GND
A10
A11
A12
A13
A14
VCC_+5V
VCC_+5V
AUX_POWER3
AUX_POWER1
B4
B5
VCC_+3.3V
GND
B6
B7
VCC_+3.3V
DS651UM23
Version 2.3
©Copyright 2005 Cirrus Logic, Inc.
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