CL-PS7500FE
System-on-a-Chip for Internet Appliance
12. VIDEO FEATURES
This section discusses the video and sound macrocell video functionality including clocks, palette, cursor,
synchronization, display support, and DACs.
12.1 Pixel Clock
The video and sound macrocell is capable of generating a display at any pixel rate up to 120 MHz. The
pixel clock may be selected from one of three sources, and the frequency of this clock may be further
divided down by a factor of between 1 and 8. These attributes are programmed by the lower 5 bits of the
control register, CONREG.
If a maximum of three master frequencies are sufficient, then the clock inputs can be used directly. How-
ever, it is often a requirement to have many different master clock frequencies. In order to obviate the need
for many crystals on the PCB, the video and sound macrocell is designed to drive a voltage controlled
oscillator (VCO) to provide the master frequency. The VCO and filter are external to CL-PS7500FE, but
everything else is built into the chip. Operation is described below:
An internal reference frequency of 32 MHz is supplied via the I_OCLK input of CL-PS7500FE.The signal
from the VCO is input into CL-PS7500FE on the pin VCLKI. VCLKO is simply the inverse of VCLKI, and
this may be used to bias the input signal about the threshold if the VCO output is not a full amplitude sig-
nal.To achieve operation at 120 MHz, the mark-space ratio of the VCO output should be as close as pos-
sible to 50-50.
The reference clock is divided by a programmable number set by the r-modulus in the fsynreg. The VCO
clock is divided by a programmable number set by the v-modulus in the fsynreg. Each of the moduli can
be a 6-bit number. The output of each of these dividers is routed into a phase comparator, and the result
is output from CL-PS7500FE as PCOMP. This pin should then be filtered and used to control the VCO
output frequency. In this way, the VCO can be set to have a frequency of v/r × Fref.
The phase comparator is of the phase-frequency type. The output PCOMP is normally tristate, but when
the VCO frequency needs to decrease, the output is low and when the VCO frequency needs to increase,
the output is high.When the two frequencies are in lock, PCOMP is be tristate, but is driven to the midpoint
for a very short time (a few ns) every r/Fref + period. The output impedance of this pin when it is driven,
is approximately 50 Ω (see Figure 12-1).
Filter and VCO selection is left to the user. It is important to avoid any low-frequency modulation of the
VCO frequency. A suitable VCO is a 74AC04-inverter element with feedback, with the supply voltage con-
trolled by the PCOMP output (see Appendix E).
With this approach, an enormous number of frequencies are possible. The 32-MHz reference frequency
generated within CL-PS7500FE can be used to yield the common VCO frequencies shown in Table 12-1.
There are many possible values of r and v. Select a set of values that favors filter response.
NOTE: Large moduli yield a lower comparison frequency.
Limit the VCO range and use the prescaler within the video and sound macrocell to obtain a lower pixel
rate than the VCO frequency. The VCO range may require constrainment so much that it cannot provide
the highest frequencies for operation of the video and sound macrocell. For this scenario, a single high-
frequency clock can be fed into CL-PS7500FE on the HCLK pin and selected for the pixel clock.
124
June 1997
VIDEO FEATURES
ADVANCE DATA BOOK v2.0
CIRRUS [ CIRRUS LOGIC ]
