CL-PD6833
PCI-to-CardBus Host Adapter
8.4
Interrupt and General Control — PME_CXT
Register Name: Interrupt and General Control — PME_CXT
I/O Index: 03h
Register Per: socket
Register Compatibility Type: 365
Memory Offset: 803h
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Ring Indicate
Enable
Card Reset*
R/W:0
Card is I/O
R/W:0
Compatibility
R/W:0
PC Card IRQ Selection
R/W:0000
R/W:0
NOTE: PME_CXT (PME Context) is a set of register bits that do not get reset or initialized if PME Enable is true
when the CL-PD6833 changes power states from D3 to D0 through a software PCI Bus Segment reset.
Bits 3:0 — PC Card IRQ Selection
Bit 3
Bit 2
Bit 1
Bit 0
IRQ Selection
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
IRQ disabled
IRQ1 for PCI/Way operation, Reserved for other modes
SMI for PCI/Way operation, Reserved for other modes
IRQ3
IRQ4
IRQ5
IRQ6 for PCI/Way operation, Reserved for other modes
IRQ7
IRQ8 for PCI/Way operation, Reserved for other modes
IRQ9
IRQ10
IRQ11
IRQ12
IRQ13 for PCI/Way operation, Reserved for other modes
IRQ14
IRQ15
NOTE: This is for I/O Card Interface mode (bit 5 of this register is ‘1’).
These bits determine which IRQ occurs when the card causes an interrupt through the
RDY/IREQ# pin on the PCMCIA socket when serial interrupt signalling is used. In PCI Interrupt
Signalling mode, these bits have no effect.
96
June 1998
DEVICE CONTROL REGISTERS
ADVANCE DATA BOOK v0.3
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