CL-PD6833
PCI-to-CardBus Host Adapter
9.1.4
System I/O Map 0–1 End Address Low
Register Name: System I/O Map 0–1 End Address Low
I/O Index: 0Ah, 0Eh
Register Per: socket
Register Compatibility Type: 365
Memory Offset: 80Ah, 80Eh
Bit 7
Bit 6
Bit 5
Bit 4
End Address 7:0
R/W:00000000
Bit 3
Bit 2
Bit 1
Bit 0
There are two separate System I/O Map End Address Low registers, each with identical fields. These
registers are located at the following indexes:
Index (Socket A)
Register
0Ah
0Eh
System I/O Map 0 End Address Low
System I/O Map 1 End Address Low
Bits 7:0 — End Address 7:0
This register contains the least-significant byte of the address that specifies where in the I/O space
the corresponding I/O map ends. I/O accesses that are equal to or below this address and equal
to or above the corresponding System I/O Map Start Address are mapped into the I/O space of
the corresponding PC Card.
The most-significant byte is located in the System I/O Map 0–1 End Address High register.
9.1.5
System I/O Map 0–1 End Address High
Register Name: System I/O Map 0–1 End Address High
Register Per: socket
Register Compatibility Type: 365
I/O Index: 0Bh, 0Fh
Memory Offset: 80Bh, 80Fh
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
End Address 15:8
R/W:00000000
There are two separate System I/O Map End Address High registers, each with identical fields. These
registers are located at the following indexes:
Index (Socket A)
Register
0Bh
0Fh
System I/O Map 0 End Address High
System I/O Map 1 End Address High
Bits 7:0 — End Address 15:8
This register contains the most-significant byte of the End Address. See the description of the End
Address field associated with bits 7:0 of the System I/O Map 0–1 End Address Low register (on
page 108).
108
June 1998
WINDOW MAPPING REGISTERS
ADVANCE DATA BOOK v0.3
CIRRUS [ CIRRUS LOGIC ]
