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CDB61577 参数 Datasheet PDF下载

CDB61577图片预览
型号: CDB61577
PDF下载: 下载PDF文件 查看货源
内容描述: T1 / E1线路接口 [T1/E1 LINE INTERFACE]
分类和应用:
文件页数/大小: 44 页 / 631 K
品牌: CIRRUS [ CIRRUS LOGIC ]
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CS61577  
ANALOG SPECIFICATIONS (TA = -40°C to 85°C; TV+, RV+ = 5.0V ±5%; GND = 0V)  
Parameter  
Min  
Typ  
Max  
Units  
Receiver  
RTIP/RRING Input Impedance  
-
50k  
-
Sensitivity Below DSX (0dB = 2.4V)  
-13.6  
500  
-
-
-
-
dB  
mV  
Loss of Signal Threshold  
-
0.30  
-
V
Data Decision Threshold  
T1, DSX-1  
(Note 20)  
(Note 21)  
60  
53  
45  
65  
65  
50  
70  
77  
55  
% of peak  
% of peak  
% of peak  
T1, DSX-1  
T1, (FCC Part 68) and E1 (Note 22)  
Allowable Consecutive Zeros before LOS  
Receiver Input Jitter Tolerance  
10kHz - 100kHz  
160  
175  
190  
bits  
(Note 23)  
0.4  
6.0  
300  
-
-
-
-
-
-
UI  
UI  
UI  
2kHz  
10Hz and below  
Jitter Attenuator  
Jitter Attenuation Curve Corner Frequency  
Attenuation at 10kHz Jitter Frequency  
Attenuator Input Jitter Tolerance (Before Onset  
of FIFO Overflow or Underflow Protection)  
(Notes 17, 24)  
(Notes 17, 24)  
-
-
12  
6
50  
23  
-
-
-
Hz  
dB  
UI  
(Notes 17, 24)  
Notes: 20. For input amplitude of 1.2 Vpk to 4.14 Vpk.  
21. For input amplitude of 0.5 Vpk to 1.2 Vpk and from 4.14 Vpk to RV+.  
22. For input amplitude of 1.05 Vpk to 3.3 Vpk.  
23. Jitter tolerance increases at lower frequencies. See Figure 11.  
24. Attenuation measured with input jitter equal to 3/4 of measured jitter tolerance. Circuit attenuates  
jitter at 20 dB/decade above the corner frequency. See Figure 12. Output jitter can increase  
significantly when more than 12 UI’s are input to the attenuator. See discussion in the text section.  
4
DS155PP2