CDB5560-2
APPENDIX A. MAXIMIZING THE PERFORMANCE OF THE CS5560
A.1 PCB Layout Considerations
• Keep the signal path short between the CS5560 ADC input capacitors C20, C28 and the ADC
input pins to minimize trace inductance.
• Power supply noise is a major design consideration and the power supplies need adequate
bypassing and bulk capacitance.
• When operating the ADC from +2.5 V and -2.5 V split supplies, place the power supply & buffer
amplifier bypass capacitor ground connections close together.
• Keep all ground connections on each differential buffer amplifier as close to the device as pos-
sible to avoid introducing differential noise through high-impedance connections.
• Keep trace lengths short between the ADC and the voltage reference IC negative supply pins.
• Route the oscillator output away from analog circuitry.
• Use a solid ground plane in the PCB layout.
• Provide adequate separation between analog and digital signals.
• To minimize distortion within the analog signal path, consider using components with smaller
voltage dependencies.
• Minimize ADC digital output edge transition current loading.
A.2 Hardware Considerations
At a system level, use shielded cable for interconnects. Keep interconnect cable lengths as short as pos-
sible. Route analog and digital signals connecting to the PCB away from each other.
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DS790DB2
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