CS4365
TABLE OF CONTENTS
1. PIN DESCRIPTION..................................................................................................................... 6
2. CHARACTERISTICS AND SPECIFICATIONS.......................................................................... 8
3. APPLICATIONS ....................................................................................................................... 20
3.1 Master Clock..................................................................................................................... 20
3.2 Mode Select...................................................................................................................... 21
3.3 Digital Interface Formats .................................................................................................. 22
3.3.1 OLM #1 ................................................................................................................ 23
3.3.2 OLM #2 ................................................................................................................ 24
3.3.3 TDM ..................................................................................................................... 24
3.4 Oversampling Modes........................................................................................................ 24
3.5 Interpolation Filter............................................................................................................. 25
3.6 De-Emphasis .................................................................................................................... 25
3.7 ATAPI Specification.......................................................................................................... 26
3.8 Direct Stream Digital (DSD) Mode.................................................................................... 26
3.9 Grounding and Power Supply Arrangements ................................................................... 27
3.9.1 Capacitor Placement............................................................................................ 27
3.10 Analog Output and Filtering............................................................................................ 27
3.11 The MUTEC Outputs...................................................................................................... 29
3.12 Recommended Power-Up Sequence............................................................................. 29
3.12.1 Hardware Mode ................................................................................................. 29
3.12.2 Software Mode................................................................................................... 29
3.13 Recommended Procedure for Switching Operational Modes......................................... 30
3.14 Control Port Interface ..................................................................................................... 31
3.14.1 MAP Auto Increment.......................................................................................... 31
2
3.14.2 I C Mode............................................................................................................ 31
2
3.14.2.1 I C Write ............................................................................................ 31
2
3.14.2.2 I C Read ............................................................................................ 32
3.14.3 SPI™ Mode........................................................................................................ 33
3.14.3.1 SPI Write............................................................................................ 33
3.15 Memory Address Pointer (MAP)
............................................................................... 33
4. REGISTER QUICK REFERENCE ........................................................................................... 34
5. REGISTER DESCRIPTION ...................................................................................................... 35
5.1 Chip Revision (address 01h) ........................................................................................... 35
5.1.1 Part Number ID (part) [Read Only] ...................................................................... 35
5.2 Mode Control 1 (address 02h).......................................................................................... 35
5.2.1 Control Port Enable (CPEN) ................................................................................ 35
5.2.2 Freeze Controls (Freeze)..................................................................................... 35
5.2.3 PCM/DSD Selection (DSD/PCM)......................................................................... 36
5.2.4 DAC Pair Disable (DACx_DIS) ............................................................................ 36
5.2.5 Power Down (PDN).............................................................................................. 36
5.3 PCM Control (address 03h)............................................................................................. 36
5.3.1 Digital Interface Format (dif) ................................................................................ 36
5.3.2 Functional Mode (FM).......................................................................................... 37
5.4 DSD Control (address 04h) ............................................................................................. 37
5.4.1 DSD Mode Digital Interface Format (DSD_dif) .................................................... 37
5.4.2 Direct DSD Conversion (DIR_DSD)..................................................................... 38
5.4.3 Static DSD Detect (static_DSD)........................................................................... 38
5.4.4 Invalid DSD Detect (invalid_DSD) ....................................................................... 38
5.4.5 DSD Phase Modulation Mode Select (DSD_PM_mode) ..................................... 38
5.4.6 DSD Phase Modulation Mode Enable (DSD_pm_EN) ........................................ 38
5.5 Filter Control (address 05h)............................................................................................. 39
5.5.1 Interpolation Filter Select (FILT_SEL).................................................................. 39
2
DS670PP1
CIRRUS [ CIRRUS LOGIC ]
