Application Information: continued
traces, as the over current condition persists. Upon
removal of the overload, the fault latch is cleared, allowing
normal operation to resume. The current limit trip point
can be adjusted through an external resistor, providing the
user with the current limit set-point flexibility.
Trace 1 - GATE(H) (10V/div)
Trace 2 - Inductor Switching Node (5V/div)
Trace 3 -Load Current (5A/div)
Trace 4 - V
(100mV/div)
OUT
Figure 10: Output Voltage Transient Response to a 14A load turn-off,
OUT = +2.825V (DAC = 10111).
V
Power Supply Sequencing
Trace 4 - 5V Supply Voltage (2V/div.)
Trace 3 - Soft Start Timing Capacitor (1V/div.)
Trace 2 - Inductor Switching Node (2V/div.)
The CS5166 offers inherent protection from undefined
start-up conditions, regardless of the 12V and 5V supply
power-up sequencing. The turn-on slew rates of the 12V
and 5V power supplies can be varied over wide ranges
without affecting the output voltage or causing detrimental
effects to the buck regulator.
Figure 11: Demonstration board hiccup mode short circuit protection.
Gate pulses are delivered while the Soft Start capacitor charges, and
cease during discharge.
Protection and Monitoring Features
Over-Current Protection
A loss-less hiccup mode current limit protection feature is
provided, requiring only the Soft Start capacitor to imple-
ment. The CS5166 provides overcurrent protection by sens-
ing the current through a “Droop” resistor, using an inter-
nal current sense comparator. The comparator compares
this voltage drop to an internal reference voltage of 76mV
(typical).
Trace 4 = 5V from PC Power Supply (2V/div.)
Trace 2 = Inductor Switching Node (2V/div.)
If the voltage drop across the “Droop” resistor exceeds this
threshold, the current sense comparator allows the fault
latch to be set. This causes the regulator to stop switching.
During this over current condition, the CS5166 stays off for
the time it takes the Soft Start capacitor to slowly discharge
by a 2µA current source until it reaches its lower 0.7V
threshold.
Figure 12: Demonstration board Start up with regulator output shorted
to ground.
Overvoltage Protection
Overvoltage protection (OVP) is provided as result of the
normal operation of the V2TM control topology and requires
no additional external components. The control loop
responds to an overvoltage condition within 100ns, causing
the top MOSFET to shut off, disconnecting the regulator
from its input voltage. The bottom MOSFET is then activat-
ed, resulting in a “crowbar” action to clamp the output
voltage and prevent damage to the load (see Figures 13
and 14). The regulator will remain in this state until the
overvoltage condition ceases or the input voltage is pulled
low. The bottom FET and board trace must be properly
designed to implement the OVP function. If a dedicated
OVP output is required, it can be implemented using the
circuit in Figure 15. In this figure the OVP signal will go
At that time the regulator attempts to restart normally by
delivering short gate pulses to both FETs. The CS5166 will
operate initially in its extended off time mode with a 50%
duty cycle, while the Soft Start capacitor is charged with a
60µA charge current. The gates will switch on while the
Soft Start capacitor is charged to its upper 2.7V threshold.
During an overload condition the Soft Start charge /dis-
charge current ratio sets the duty cycle for the pulses
(2µA/60µA = 3.3%), while actual duty cycle is half that due
to the extended off time mode (1.65%) when VFB is less
than 1V. The Soft Start hiccup pulses last for a 3ms period
at the end of which the duty cycle repeats if a fault is
detected, otherwise normal operation resumes.
high (overvoltage condition), if the output voltage (VCORE
)
This protection scheme minimizes thermal stress to the reg-
exceeds 20% of the voltage set by the particular DAC code
ulator components, input power supply, and PC board
10
CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
