Electrical Characteristics: 0˚C < T
A
< 70˚C; 0˚C < T
J
< 125˚C; 8V < V
CC
< 20V; 2.8V DAC Code (V
ID4
=V
ID2
=V
ID1
=V
ID0
=1, V
ID3
= 0),
C
GATE(H)
= C
GATE(L)
= 3.3nF, C
OFF
= 330pF, C
SS
= 0.1µF; Unless otherwise stated.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
CS5165H
s
V
CC
Supply Current
Operating
Sleep Mode
s
V
CC
Monitor
Start Threshold
Stop Threshold
Hysteresis
s
Error Amplifier
V
FB
Bias Current
COMP Source Current
COMP CLAMP Voltage
COMP Clamp Current
COMP Sink Current
Open Loop Gain
Unity Gain Bandwidth
PSRR @ 1kHZ
s
GATE(H) and GATE(L)
High Voltage at 100mA
Low Voltage at 100mA
Rise Time
Fall Time
GATE(H) to GATE(L) Delay
GATE(L) to GATE(H) Delay
GATE pull-down
s
Fault Protection
SS Charge Time
SS Pulse Period
SS Duty Cycle
SS Comp Clamp Voltage
V
FB
Low Comparator
1V < V
FB
< V
DAC
(max on-time)
No Loads on Gate(H) and Gate(L)
ENABLE = 0V, 8V< V
CC
<14V
12
300
20
600
mA
µA
GATE(H) Switching
GATE(H) not switching
Start - Stop
3.75
3.65
3.95
3.87
80
4.15
4.05
V
V
mV
V
FB
= 0V
COMP = 1.2V to 3.6V; V
FB
= 2.7V
V
FB
= 2.7V, Adjust COMP voltage for
Comp current = 50µA
COMP = 0V
V
COMP
=1.2V; V
FB
= 3V; V
SS
> 2.5V
Note 1
Note 1
Note 1
15
0.85
0.4
180
50
0.5
60
0.1
30
1.0
1.0
400
60
2
85
1.0
60
1.15
1.6
800
µA
µA
V
mA
µA
dB
MHz
dB
Measure V
CC
-GATE
Measure GATE
1.6V < GATE < (V
CC
- 2.5V),
8V < V
CC
< 14V
(V
CC
- 2.5V) > GATE > 1.6V,
8V < V
CC
< 14V
GATE(H) < 2V, GATE(L) > 2V,
8V < V
CC
< 14V
GATE(L) < 2V, GATE(H) > 2V,
8V < V
CC
< 14V
Resistance to PGnd (note 1)
30
30
20
1.2
1.0
40
40
65
65
50
2.0
1.5
80
80
100
100
115
V
V
ns
ns
ns
ns
kΩ
V
FB
= 0V
V
FB
= 0V
(Charge Time/Period)
×
100
V
FB
= 2.7V, V
SS
= 0V
Increase V
FB
till no SS
pulsing and normal Off-time.
1.6
25
1.0
0.50
0.9
3.3
100
3.3
0.95
1.0
5.0
200
6.0
1.10
1.1
ms
ms
%
V
V
s
PWM Comparator
Transient Response
V
FB
= 1.2 to 5V 500ns after
GATE(H) (after Blanking time) to
GATE(H) = (V
CC
- 1V) to 1V,
8V < V
CC
< 14V
3
100
150
ns
CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
