Applications Information: continued
where:
1
Period =
switching frequency
“Droop” Resistor for Adaptive Voltage Positioning
Adaptive voltage positioning is used to reduce output volt-
age excursions during abrupt changes in load current.
Regulator output voltage is offset +40mV when the regula-
tor is unloaded, and -40mV at full load. This results in
increased margin before encountering minimum and maxi-
mum transient voltage limits, allowing use of less capaci-
tance on the regulator output (see Figure 7).
To implement adaptive voltage positioning, a “droop”
resistor must be connected between the output inductor
and output capacitors and load. This is normally imple-
mented by a PC board trace of the following value:
Channel 3 = V
M1= V
Channel 2 = Inductor Switching Node
GATE
- 5V
GATE
IN
80mV
RDROOP
=
IMAX
Figure 15: CS5156 gate drive waveforms depicting rail to rail swing.
Adaptive voltage positioning can be disabled for improved
DC regulation by connecting the VFB pin directly to the load
using a separate, non-load current carrying circuit trace.
The most important aspect of MOSFET performance is
RDSON, which effects regulator efficiency and MOSFET
thermal management requirements.
Input and Output Capacitors
The power dissipated by the MOSFETs and the Schottky
These components must be selected and placed carefully to
yield optimal results. Capacitors should be chosen to pro-
vide acceptable ripple on the input supply lines and regula-
tor output voltage. Key specifications for input capacitors
are their ripple rating, while ESR is important for output
capacitors. For best transient response, a combination of
low value/high frequency and bulk capacitors placed close
to the load will be required.
diode may be estimated as follows;
Switching MOSFET:
Power = ILOAD2 × RDSON × duty cycle
Schottky diode:
Power = VFORWARD × ILOAD × (1 - duty cycle)
VOUT + VFORWARD
Duty Cycle =
Output Inductor
VIN + VFORWARD - (ILOAD × RDSON OF SWITCH FET
)
The inductor should be selected based on its inductance,
current capability, and DC resistance. Increasing the induc-
tor value will decrease output voltage ripple, but degrade
transient response.
Off Time Capacitor (COFF
The COFF timing capacitor sets the regulator off time:
)
TOFF = COFF × 4848.5
Thermal Management
When the VFFB pin is less than 1V, the current charging the
C
OFF capacitor is reduced. The extended off time can be cal-
Thermal Considerations for Power MOSFETs and Diodes
culated as follows:
TOFF = COFF × 24,242.5.
In order to maintain good reliability, the junction tempera-
ture of the semiconductor components should be kept to a
maximum of 150°C or lower. The thermal impedance (junc-
tion to ambient) required to meet this requirement can be
calculated as follows:
Off time will be determined by either the TOFF time, or the
time out timer, whichever is longer.
The preceding equations for duty cycle can also be used to
calculate the regulator switching frequency and select the
COFF timing capacitor:
T
JUNCTION(MAX) - TAMBIENT
Power
Thermal Impedance =
Period × (1 - duty cycle)
A heatsink may be added to TO-220 components to reduce
their thermal impedance. A number of PC board layout
techniques such as thermal vias and additional copper foil
COFF
=
,
4848.5
11
CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
