Electrical Characteristics: 0˚C < TA < 70˚C; 0˚C < TJ < 125˚C; 9V < VCC < 14V;
2.0V DAC Code (VID4 = VID3 =VID2 = VID1 = 0, VID0 = 1), CGATE(H) = CGATE(L) = 3.3nF, COFF = 390pF; Unless otherwise stated.
PARAMETER
Line Regulation
TEST CONDITIONS
9V ≤ VCC ≤ 14V
MIN
TYP
0.01
1.25
50
MAX
UNIT
%/V
V
Input Threshold
V
V
ID4, VID3, VID2, VID1, VID0
ID4, VID3, VID2, VID1, VID0
1.00
25
2.40
100
Input Pull-up Resistance
Pull-up Voltage
kΩ
5.48
5.65
5.82
V
ꢀ GATE(H) and GATE(L)
High Voltage at 100mA
Measure VCC –GATE(L)/(H)
1.2
2.1
V
Low Voltage at 100mA
Rise Time
Measure GATE(L)/(H)
1.0
40
1.5
80
V
1.6V < GATE(H)/(L) < (VCC – 2.5V)
ns
Fall Time
(VCC – 2.5V) > GATE(L)/(H) > 1.6V
GATE(H) < 2V, GATE(L) > 2V
40
65
65
50
80
ns
ns
GATE(H) to GATE(L) Delay
GATE(L) to GATE(H) Delay
GATE pull-down
30
30
20
110
110
115
V
CC = 12V
GATE(L) < 2V, GATE(H) > 2V
CC = 12V
ns
V
Resistance to Gnd (Note 2)
kΩ
ꢀ Overcurrent Protection
OVC Comparator Offset Voltage
0V ≤ VOUT ≤ 3.5V
0.2V ≤ VOUT ≤ 3.5V
77
86
101
mV
Discharge Threshold Voltage
0.2
0.25
0.1
0.3
7.0
V
VOUT Bias Current
-7.0
µA
OVC Latch Discharge Current
VCOMP = 1V
100
800
2500
µA
ꢀ PWM Comparator
PWM Comparator Offset Voltage 0V ≤ VFB ≤ 3.5V
0.99
1.10
200
1.23
300
V
Transient Response
VFB = 0 to 3.5V
ns
ꢀ COFF
Off-Time
1.0
1.6
2.3
µs
Charge Current
V
V
COFF = 1.5V
COFF = 1.5V
550
µA
Discharge Current
25
mA
ꢀ Power-Good Output
PWRGD Sink Current
V
FB = 1.7V, VPWRGD = 1V
0.5
4
15
mA
PWRGD Upper Threshold
PWRGD Lower Threshold
PWRGD Output Low Voltage
% of nominal DAC code
% of nominal DAC code
5
8.5
-8.5
0.2
12
-5
%
%
V
-12
VFB = 1.7V, IPWRGD = 500µA
0.3
4
CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
