CS5127
Applications Information: continued
1 + s(3.3E-5)
s
2
(2.772E-9) + s(2.902E-5) + 0.42
The zero frequency due to the output capacitor ESR is
given as
1
= 4.8 kHz.
(2¹CR
C
)
The double pole frequency of the power output stage is
1
R + R
1
=
= 1.95 kHz.
LC(R + R
C
)
(2¹)
The ESR zero approximately cancels one of the poles, and
the total phase shift is limited to 90. Bode plots are provid-
ed below.
20
divider. This factor will further reduce the overall system
gain.
By adding the two pole, one zero compensation network
shown in figure 6, we can maximize the DC gain and push
out the crossover frequency. The transfer function for the
compensation network is
V
CONTROL
s C1(R1 + R2) + 1
=
-s C2 R1(s C1 R2 + 1)
V
FB
This can be rewritten in terms of pole and zero frequencies
and a gain constant A.
V
CONTROL
s/(2¹f
Z
+ 1)
=
V
FB
-A s ((s/2f
P
) + 1)
where
f
Z
=
1
(2¹ C1 (R1 + R2))
f
P
=
1
and A = R1 C2
2¹ C1R2
0
Gain, (dB)
-20
-40
Note that, due to the first s term in the denominator, a pole
is located at f = 0. This will provide the maximum DC
gain.
The optimum performance can be obtained by choosing f
Z
equal to the output double pole frequency and setting f
P
to
approximately half of the switching frequency. Gain fac-
tors can be chosen somewhat arbitrarily.
Values between
1E-6�½F and 20E-6�½F are practical. We then have a set of
equations that can be solved for component values:
1
2¹
-60.0
1
10
10
2
10
3
10
4
10
5
10
6
10
7
Frequency (Hz)
Figure 7: Bode plot of gain response for V
OUT
/V
CONTROL
.
90
C1 R1 =
[
1
f
Z
-
1
f
P
]
,
C1 R2 =
1
2¹f
P
,
C2 =
A
R1
Phase, (degree)
0
-90
Since there are only three equations, we must arbitrarily
choose one of the components. One option is to set the
value of R1 fairly large. This provides a high impedance
path between the V
FB
pin and the COMP pin.
For our design, we have f
Z
= the double pole frequency =
1.95 kHz and f
P
= f
OSC
/2 = 100kHz. LetÕs arbitrarily choose
R1 = 4.7K. Then we solve the first equation for C1 and
obtain C1 = 17nF. Use a standard value of 22 nF.
1
10
10
2
10
3
10
4
10
5
10
6
10
7
Frequency (Hz)
-180
-270.0
Figure 8: Bode plot of phase response for V
OUT
/V
CONTROL
.
This uncompensated system is stable, but the low gain will
result in poor DC accuracy, and the low cutoff frequency
will result in poor transient response. Note that we have
not yet included the gain factor from the feedback resistor
12
We next solve for R2. With C1 =22 nF, R2= 72�½. Use a
standard value of 75�½.
We can choose a gain factor from somewhere in the
middle of our range and solve for C2. If A = 10E-6�½F, we
have
C2 = 2.1 nF. Use a standard value of 2.2 nF.
CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
