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CS5106LSW24 参数 Datasheet PDF下载

CS5106LSW24图片预览
型号: CS5106LSW24
PDF下载: 下载PDF文件 查看货源
内容描述: 多重功能,同步加辅助PWM控制器 [Multi-Feature, Synchronous plus Auxiliary PWM Controller]
分类和应用: 开关光电二极管控制器
文件页数/大小: 12 页 / 199 K
品牌: CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
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CS5106
Electrical Characteristics: T
J
= -40¡C to 125¡C, V
SS
= 9 to 16V, V
5REF
I
LOAD
= 2mA, SYNC
OUT
Free Running, unless other-
wise specified. For All Specs: UVSD=6V, OVSD = 0V, ENABLE = 0V, I
LIM(1,2)
= 0,V
FB(1,2)
= 3V,R
FADJ
= R
DLYSET
= 27.4k�½.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
s
Current Limit Circuits
I
LIM1
Current Limit Threshold
Voltage
I
LIM1
Short Circuit Threshold
Voltage
I
LIM1
Input Bias Current
I
LIM2
Current Limit
Threshold V
I
LIM2
Short Circuit
Threshold Voltage
I
LIM2
Input Bias Current
Adjust I
LIM1
from 1.0V - 1.3V until
GATE1 goes low.
Adjust I
LIM1
from 1.30V - 1.50V until
GATE1 skips 2-cycles with reference
to SYNC
OUT.
Set I
LIM1
=0V. Measure current
out of I
LIM1
lead.
Adjust I
LIM2
from 1.0V - 1.3V until
GATE2 goes low.
Adjust I
LIM2
from 1.30V - 1.50V until
GATE2 skips 2-cycles with reference
to SYNC
OUT
.
Set I
LIM 2
= 0V. Measure current out
of I
LIM2
lead.
1.16
1.35
1.24
1.44
1.30
1.51
V
V
0.50
1.16
1.35
1.24
1.44
5.00
1.30
1.51
µA
V
V
0.50
5.00
µA
s
Voltage Feedback Control
RAMP1 Offset Voltage
RAMP1 Input Bias Current
RAMP2 Offset Voltage
RAMP2 Input Bias Current
V
FB1
Input Impedance
V
FB2
Input Impedance
s
Gate1,2,2B Output Voltages
GATE1 Low State
GATE2 Low State
GATE2B Low State
GATE2B High State
GATE2 High State
GATE1 High State
V
FB1
=0V. Adjust RAMP1 from 0V - 0.3V
until GATE1 goes low. Measure V
RAMP1
.
Set RAMP1 = 0V. Measure Current
out of RAMP1 lead.
V
FB2
= 0V. Adjust RAMP2 from
0V-3V until GATE2 goes low.
Measure V
RAMP2
.
Set RAMP2 = 0V. Measure Current
out of RAMP2 lead.
Measure input impedance.
Measure Input impedance.
V
SS
= 12V. V
CC
= V
SS
- V
DON
PROGRAM = 0V. Measure GATE1
voltage when sinking 1mA.
PROGRAM = 0V. Measure GATE2
voltage when sinking 1mA.
PROGRAM = 0V. Measure GATE2B
voltage when sinking 1mA.
Measure V
CC
- GATE2B voltage
when sourcing 1mA.
Measure V
CC
- GATE2 voltage
when sourcing 1mA.
Measure V
CC
- GATE1 voltage
when sourcing 1mA.
0.08
0.13
0.50
0.20
5.00
0.20
V
µA
V
0.08
0.13
60.0
60.0
0.50
120.0
120.0
5.00
220.0
220.0
µA
k�½
k�½
0.15
0.18
0.18
1.65
1.65
1.65
0.80
0.80
0.80
2.00
2.00
2.00
V
V
V
V
V
V
s
Propagation Delays
I
LIM1
Delay to Output GATE1
Measure delay from I
LIM1
going
high to GATE1 going low.
Measure delay from I
LIM2
going
I
LIM2
Delay to Output GATE2
high to GATE2 going low.
RAMP1 Delay to Output GATE1 Measure delay from RAMP1 going
high to GATE1 going low.
RAMP2 Delay to Output GATE2 Measure delay from RAMP2 going
high to GATE2 going low.
5
80.0
80.0
80.0
80.0
120.0
100.0
115.0
100.0
ns
ns
ns
ns