CS51033
Applications Information: continued
to rise slowly and finally it controls the Hiccup short circuit
protection circuitry. This function reduces the PFET's duty
cycle to 2% of the C
S
period.
The most important consideration in calculating C
S
is that
it’s voltage does not reach 2.5V (the voltage at which the
fault detect circuitry is enabled) before V
FB
reaches 1.15V
otherwise the power supply will never start.
If the V
FB
pin reaches 1.15V the fault timing comparator will
discharge C
S
and the supply will not start. For the V
FB
volt-
age to reach 1.15V the output voltage must be at least 4
×
1.15 = 4.6V.
If we choose an arbitrary startup time of 200µs we calculate
the value of C
S
from:
C
S
×
2.5V
T = I
CHARGE
C
S(min)
=
Use 0.1µf.
The fault time out time is the sum of the slow discharge
time the fast discharge time and the recharge time and is
obviously dominated by the slow discharge time.
The first parameter is the slow discharge time, it is the time
for the C
S
capacitor to discharge from 2.4V to 1.5V and is
given by:
C
S
×
(2.4V-1.5V)
T
SLOWDISCHARGE
=
Where I
DISCHARGE
is 6µA typical.
T
SLOWDISCHARGE
= C
S
×
1.5V
×
10
5
The fast discharge time occurs when a fault is first detected.
The C
S
capacitor is discharged from 2.5V to 2.4V.
T
FASTDISCHARGE
=
C
S
×
(2.5V - 2.4V)
Ι
FASTDISCHARGE
Ι
DISCHARGE
200µs
×
264µA
= 0.02µF
2.5V
For this circuit
T
FAULT
= 0.1
×
10
-6
×
1.55
×
10
5
= 0.0155
A larger value of C
S
will increase the fault time out time but
will also increase the soft start time.
8) Input Capacitor.
The input capacitor reduces the peak currents drawn from
the input supply and reduces the noise and ripple voltage
on the V
CC
and V
C
pins. This capacitor must also ensure
that the V
CC
remains above the UVLO voltage in the event
of an output short circuit. C
IN
should be a low ESR capacitor
of at least 100µf. A ceramic surface mount capacitor should
also be connected between V
CC
and ground to prevent
spikes.
9) MOSFET Selection
The CS51033 drive a P-channel MOSFET. The V
GATE
pin
swings from Gnd to V
C
. The type of PFET used depends on
the operating conditions but for input voltages below 7V a
logic level FET should be used.
Choose a PFET with a continuous drain current (Id) rating
greater than the maximum output current. R
DS(on)
should be
less than
R
DS
< =
0.6V
I
OUT(max)
167mΩ
The Gate-to-Source voltage VGS and the Drain-to Source
Breakdown Voltage should be chosen based on the input
supply voltage.
The power dissipation due to the conduction losses is given
by:
P
D
=
OUT2
×
R
DS(on)
×
D
The power dissipation due to the switching losses is given
by:
P
D
= 0.5
×
V
IN
×
I
OUT
×
(T
Rr +
T
F
)
×
F
SW
Where tr =Rise Time and tf= Fall Time.
10) Diode Selection.
The flyback or catch diode should be a Schottky diode
because of it’s fast switching ability and low forward volt-
age drop. The current rating must be at least equal to the
maximum output current. The breakdown voltage should
be at least 20V for this 12V application.
The diode power dissipation is given by:
P
D
= I
OUT
×
V
D
×
(1-D
MIN
)
Where I
FASTDISCHARGE
is 66µA typical.
T
FASTDISCHARGE
= C
S
×
1515
The recharge time is the time for C
S
to charge from 1.5V to
2.5V.
T
CHARGE
=
C
S
×
(2.5V-1.5V)
Ι
CHARGE
Where I
CHARGE
is 264µA typical.
T
CHARGE
= C
S
×
3787
The fault time out time is given by:
T
FAULT
= C
S
×
(3787 + 1515 + 1.5
×
10
5
)
T
FAULT
= C
S
×
1.55
×
10
5
7
CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
