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CAT1021WI-25T2 参数 Datasheet PDF下载

CAT1021WI-25T2图片预览
型号: CAT1021WI-25T2
PDF下载: 下载PDF文件 查看货源
内容描述: 监控电路,带有I2C串行2K位CMOS EEPROM ,手动复位及看门狗定时器 [Supervisory Circuits with I2C Serial 2k-bit CMOS EEPROM, Manual Reset and Watchdog Timer]
分类和应用: 监控可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 21 页 / 278 K
品牌: CATALYST [ CATALYST SEMICONDUCTOR ]
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CAT1021, CAT1022, CAT1023  
Acknowledge Polling  
READ OPERATIONS  
Disabling of the inputs can be used to take  
advantage of the typical write cycle time. Once the  
stop condition is issued to indicate the end of the  
host’s write opration, the CAT1021/22/23 initiates  
the internal write cycle. ACK polling can be initiated  
immediately. This involves issuing the start condition  
followed by the slave address for a write operation. If  
the device is still busy with the write operation, no  
ACK will be returned. If a write operation has  
completed, an ACK will be returned and the host can  
then proceed with the next read or write operation.  
The READ operation for the CAT1021/22/23 is initiated in  
the same manner as the write operation with one  
¯¯  
exception, the R/W bit is set to one. Three different READ  
operations are possible: Immediate/Current Address  
READ, Selective/Random READ and Sequential READ.  
WRITE PROTECTION PIN (WP)  
The Write Protection feature (CAT1021 only) allows  
the user to protect against inadvertent memory array  
programming. If the WP pin is tied to VCC, the entire  
memory array is protected and becomes read only.  
The CAT1021 will accept both slave and byte addre-  
sses, but the memory location accessed is protected  
from programming by the device’s failure to send an  
acknowledge after the first byte of data is received.  
Figure 10. Immediate Address Read Timing  
S
T
A
R
T
S
T
O
P
BUS ACTIVIT Y:  
MASTER  
SLAVE  
ADDRESS  
SDA LINE  
S
P
A
C
K
N
O
DATA  
A
C
K
SCL  
SDA  
8
9
8TH BIT  
DATA OUT  
NO ACK  
STOP  
Doc. No. 3009 Rev. L  
12  
© 2007 Catalyst Semiconductor, Inc.  
Characteristics subject to change without notice  
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