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CM3205 参数 Datasheet PDF下载

CM3205图片预览
型号: CM3205
PDF下载: 下载PDF文件 查看货源
内容描述: DDR VDDQ和终止稳压器 [DDR VDDQ and Termination Voltage Regulator]
分类和应用: 稳压器双倍数据速率
文件页数/大小: 10 页 / 228 K
品牌: CALMIRCO [ CALIFORNIA MICRO DEVICES CORP ]
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PRELIMINARY
CM3205
Application Information (cont’d)
The V
TT
power requirement is proportional to the num-
ber of data lines and the resistance of the termination
resistor, but does not vary with memory size. In a typi-
cal DDR data bus system each data line termination
may momentarily consume 16.2-mA to achieve the
405-mV minimum over V
TT
needed at the receiver:
405mV-
I
terminaton
= --------------------- = 16.2mA
Rt
(
25Ω
)
the increased package power dissipation and propor-
tionally increased heat generation.
V
REF
is typically routed to inputs with high impedance,
such as a comparator, with little current draw. An ade-
quate V
REF
can be created with a simple voltage
divider of precision, matched resistors from V
DDQ
to
ground. A small ceramic bypass capacitor can also be
added for improved noise performance.
A typical 128 Mbyte SSTL-2 memory system, with 192
terminated lines, has a worst-case maximum V
TT
sup-
ply current up to
±3.11A.
However, a DDR memory
system is dynamic, and the theoretical peak currents
only occur for short durations, if they ever occur at all.
These high current peaks can be handled by the V
TT
external capacitor. In a real memory system, the con-
tinuous average V
TT
current level in normal operation
is less than
±200
mA.
The V
DDQ
power supply, in addition to supplying cur-
rent to the memory banks, could also supply current to
controllers and other circuitry. The current level typi-
cally stays within a range of 2.0A to 3.0A, with peaks
up to 4.0A or more, depending on memory size and the
computing operations being performed.
The tight tracking requirements and the need for V
TT
to
sink, as well as source, current provide unique chal-
lenges for powering DDR SDRAM.
CM3205 Regulator
The CM3205 dual output linear regulator provides all of
the power requirements of DDR memory by combining
two linear regulators into a single TO-263 or TO-252 5-
lead package. The V
DDQ
regulator can supply up to 5A
continuous current, and the two-quadrant V
TT
termina-
tion regulator has current sink and source capability to
±2A. The V
DDQ
linear regulator uses a PMOS pass
element for a very low dropout voltage, typically 600mV
at a 5A output. The output voltage of the V
DDQ
regula-
tor can be set by an external voltage divider. The sec-
ond output, V
TT
, is regulated at V
DDQ
/2 by an internal
resistor divider. The V
TT
regulator can source, as well
as sink, up to 2A continuous current. The CM3205 is
designed for optimal operation from a nominal 3.3VDC
bus, but can work with V
IN
as high as 5V. When operat-
ing at higher V
IN
voltages, attention must be given to
©
2006 California Micro Devices Corp. All rights reserved.
05/08/06
Input and Output Capacitors
The CM3205 requires that at least a 680μF electrolytic
capacitor be located near the V
IN
pin for stability and to
maintain the input bus voltage during load transients.
An additional 4.7μF ceramic capacitor between the V
IN
(pin 4) and the GND (pin 5), located as close as possi-
ble to those pins, is recommended to ensure stability.
A minimum of a 680μF electrolytic capacitor is recom-
mended for the V
DDQ
output. An additional 4.7μF
ceramic capacitor between the V
DDQ
(pin 2) and GND,
located very close to those pins, is recommended.
A minimum of a 680μF, electrolytic capacitor is recom-
mended for the V
TT
output. This capacitor should have
low ESR to achieve best output transient response. SP
or OSCON capacitors provide low ESR at high fre-
quency, and thus are a good choice. In addition, place
a 4.7μF ceramic capacitor between the V
TT
pin (pin 5)
and GND, located very close to those pins. The total
ESR must be low enough to keep the transient within
the V
TT
window of 40-mV during the transition for
source to sink. An average current step of
±0.5A
requires:
40mV
-
ESR
<
-------------- = 40mΩ
1A
Both outputs will remain stable and in regulation even
during light or no load conditions.
Adjusting V
DDQ
Output Voltage
The CM3205 internal bandgap reference is set at
1.215V. The V
DDQ
voltage is adjustable by using a
resistor divider, R1 and R2:
R2
-
V
OUT
= V
ADJ
× ⎛
1 + ------
R1
490 N. McCarthy Blvd., Milpitas, CA 95035-5112
l
Tel: 408.263.3214
l
Fax: 408.263.7846
l
www.cmd.com
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