欢迎访问ic37.com |
会员登录 免费注册
发布采购

TMC22052AKHC 参数 Datasheet PDF下载

TMC22052AKHC图片预览
型号: TMC22052AKHC
PDF下载: 下载PDF文件 查看货源
内容描述: 多标准数字视频解码器三线自适应梳状解码器系列, 8和10位 [Multistandard Digital Video Decoder Three-Line Adaptive Comb Decoder Family, 8 & 10 bit]
分类和应用: 解码器
文件页数/大小: 84 页 / 515 K
品牌: CADEKA [ CADEKA MICROCIRCUITS LLC. ]
 浏览型号TMC22052AKHC的Datasheet PDF文件第6页浏览型号TMC22052AKHC的Datasheet PDF文件第7页浏览型号TMC22052AKHC的Datasheet PDF文件第8页浏览型号TMC22052AKHC的Datasheet PDF文件第9页浏览型号TMC22052AKHC的Datasheet PDF文件第11页浏览型号TMC22052AKHC的Datasheet PDF文件第12页浏览型号TMC22052AKHC的Datasheet PDF文件第13页浏览型号TMC22052AKHC的Datasheet PDF文件第14页  
TMC22x5yA
PRODUCT SPECIFICATION
Reg
2D
2D
2E
2E
2F
30
30
30
30
30
30
30
30
31
32
33
33
33
33
34
35
36
37
37
37
37
38
39
3A
3B
3C
3C
3C
3C
3D
3E
3F
3F
3F
Bit
2
1-0
7-1
0
7-0
7
6
5
4
3
2
1
0
7-0
7-0
7
6-4
3
2-0
7-0
7-0
7-0
7-6
5-4
3-2
1-0
7-0
7-0
7-0
7-0
7-6
5-4
3-2
1-0
7-0
7-0
7
6
5-0
Name
YOFF1
8
SG1
7-0
SYSPH1
6-0
VAXIS1
SYSPH1
14-7
Function
Y offset, msb
Msync gain, 2 msbs
7 lsbs of phase
V axis flip
8 msbs of phase
set to zero
Reg
40
41
41
41
41
41
41
41
41
42
42
42
42
43
43
43
43
43
43
43
44
44
45
46
47
48-
4A
4B
4B
4B
4C-
FF
Bit
7-0
7
6
5
4
3
2
1
0
7
6
5
4-0
7
6
5
4
3
2
1-0
7
6-0
7-0
7-0
7-0
7-0
7
6-5
4-0
7-0
Name
DDSPH
LINEST
BGST
VACT2
PALODD
VFLY
FGRAB
LGRAB
PGRAB
FLD
VBLK
HBLK
LID
YGO
YGU
UBO
UBU
VRO
VRU
MONO
FPERR
DRS
PARTID
REVID
Function
DDS phase, 8 msbs
Pixel count reset
Start of burst gate
Half line flag
PAL Ident
Vertical count reset
Field grab
Line grab
Pixel grab
Field flag (F in D1 output)
Vertical blanking (V in D1
output)
Horizontal blanking (H in
D1 output)
Line identification
Y/G overflow
Y/G underflow
C
B
/B overflow
C
B
/B underflow
C
R
/R overflow
C
R
/R underflow
reserved
Color kill active
Frequency/Phase error
DRS signal
Reads back xx
h
Revision number
reserved
Status - Read Only
Video Measurement
LGF
LGEN
LGEXT
PGG
PGEN
PGEXT
PG
7-0
LG
7-0
FG
LG
8
PG
10-8
GY
9-2
BU
9-2
RV
9-2
GY
1-0
BU
1-0
RV
1-0
Y
9-2
M
9-2
U
9-2
V
9-2
Y
1-0
M
1-0
U
1-0
V
1-0
TEST
TEST
VBIT20
PEDDIS
CCDEN
5-0
Line grab flag
Line grab enable
Ext line grab enable
reserved, set to zero
Pixel grab gate
Pixel grab enable
Ext pixel grab enable
Pixel grab, 8 lsbs
Line grab, 8 lsbs
reserved, set to zero
Field grab number
Msb of line grab
Pixel grab, 3 msbs
G/Y grab, 8 msbs
B/U grab, 8 msbs
R/V grab, 8 msbs
reserved
G/Y grab, 2 lsbs
B/U grab, 2 lsbs
R/V grab, 2 lsbs
Luma grab, 8 msbs
Msync grab, 8 msbs
U grab, 8 msbs
V grab, 8 msbs
Luma grab, 2 lsbs
Msync grab, 2 lsbs
U grab, 2 lsbs
V grab, 2 lsbs
Test Control
Must be set to zero
Must be set to zero
V bit control
Pedestal control
Closed caption control
PKILL
CFSTAT
XOP
Phase kill from comb fail
Comb filter status
XLUT output
reserved
Notes:
1. Functions are listed in the order of reading and writing.
2. For each register listed above up to register 3F, all bits not
specified are reserved and must be set to zero to ensure
proper operation.
Vertical Blanking Control
Auto-increment stops at 3F
10
REV. 1.0.0 2/4/03