TMC2193
PRODUCT SPECIFICATION
•
CSMFMT = 01 , YC
B
C
R
input source with YUV and
RGB outputs.
Matrix configuration:
= MCF1 * Y
in
Y
composite
U
= MCF4 * C
B
V
G
B
R
= MCF6 * C
R
= MCF8 * (MCF1 * Y
in
+ MCF2 * C
B
+ MCF3 * C
R
)
= MCF9 * (MCF1 * Y
in
+ MCF5 * C
B
)
= MCF10 * (MCF1 * Y
in
+
MCF7 * C
R
)
Y
P
B
P
R
•
= MCF8 * Y
composite
= MCF9 * U
= MCF10 * V
CSMFMT = 11 , RGB input source with YUV and RGB
outputs.
Matrix configuration:
Y
composite
= MCF1 * G
in
+ MCF2 * B
in
+
MCF3 * R
in
U
= MCF4 * B
in
+ MCF5 * Y
composite
V
G
B
R
= MCF6 * R
in
+ MCF7 * Y
composite
= MCF8 * G
in
= MCF9 * B
in
= MCF10 * R
in
•
CSMFMT = 10 , RGB input source with YUV and
YP
B
P
R
outputs.
Matrix configuration:
= MCF1 * G
in
+ MCF2 * B
in
+
Y
composite
MCF3 * R
in
U
= MCF4 * B
in
+ MCF5 * Y
composite
V
= MCF6 * R
in
+ MCF7 * Y
composite
The color space matrix consists of 10 multipliers with inde-
pendently adjustable coefficients, and a resolution of
0.00049 (1/2048). The amount of gain varies among coeffi-
cients, Table 1 summarizes the gain for each coefficient.
Table 1. CSM Coefficient Range
Coefficient
MCF1
MCF2
MCF3
MCF4
MCF5
Gain Range
0 to 2
-1 to 1
-1 to 1
0 to 1
-2 to 2
Must be loaded in 2’s comp format.
Must be loaded in 2’s comp format.
11 bit coefficient.
Negative values are enabled when CSMFMT is 1x, only the 12 LSB’s
are required to be loaded into the control registers. Must be loaded in 2’s
comp format.
11 bit coefficient.
Negative values are enabled when CSMFMT is 1x, only the 12 LSB’s
are required to be loaded into the control registers. Must be loaded in 2’s
comp format.
Comment
MCF6
MCF7
0 to 1
-2 to 2
MCF8
MCF9
MCF10
0 to 2
0 to 2
0 to 2
estal insertion. The blank, pedestal, and sync values are
given as a reference. Table 4 and Table 5 give the default
coefficients values for the CSM in all modes and standard
video formats.
To aid in the programming of the color space matrix Table 2
and Table 3 provide a set of default input and output values
for 100% color bars. The component values given will be
after the preprocessing block and prior to the sync and ped-
10
REV. 1.0 3/26/03
CADEKA [ CADEKA MICROCIRCUITS LLC. ]
