Data Sheet
Power Dissipation
Application Information
Power dissipation should not be a factor when operating
under the stated 2k ohm load condition. However, ap-
plications with low impedance, DC coupled loads should
be analyzed to ensure that maximum allowed junction
temperature is not exceeded. Guidelines listed below can
be used to verify that the particular application will not
cause the device to operate beyond it’s intended operat-
ing range.
Basic Operation
Figures 1, 2, and 3 illustrate typical circuit configurations for
non-inverting, inverting, and unity gain topologies for dual
supply applications. They show the recommended bypass
capacitor values and overall closed loop gain equations.
+Vs
6.8μF
Maximum power levels are set by the absolute maximum
junction rating of 150°C. To calculate the junction tem-
0.1μF
Input
+
-
perature, the package thermal resistance value Theta
JA
Output
(Ө ) is used along with the total die power dissipation.
JA
RL
T
= T + (Ө × P )
Ambient JA D
Junction
0.1μF
6.8μF
Rf
Where T
is the temperature of the working environment.
Ambient
Rg
In order to determine P , the power dissipated in the load
needs to be subtracted from the total power delivered by
the supplies.
G = 1 + (Rf/Rg)
D
-Vs
Figure 1. Typical Non-Inverting Gain Circuit
P = P
- P
load
D
supply
+Vs
Supply power is calculated by the standard power equa-
tion.
6.8μF
R1
P
= V
× I
supply
supply RMS supply
0.1μF
+
Output
Rg
V
= V - V
S+ S-
supply
Input
-
RL
Power delivered to a purely resistive load is:
0.1μF
Rf
2
P
= ((V
)
)/Rload
eff
load
LOAD RMS
6.8μF
G = - (Rf/Rg)
-Vs
The effective load resistor (Rload ) will need to include
the effect of the feedback network. For instance,
eff
For optimum input offset
voltage set R1 = Rf || Rg
Rload in figure 3 would be calculated as:
Figure 2. Typical Inverting Gain Circuit
eff
R || (R + R )
L
f
g
+Vs
6.8μF
These measurements are basic and are relatively easy to
perform with standard lab equipment. For design purposes
however, prior knowledge of actual signal levels and load
impedance is needed to determine the dissipated power.
0.1μF
Input
+
Output
Here, P can be found from
D
-
RL
P = P
+ P
- P
D
Quiescent
Dynamic Load
0.1μF
Quiescent power can be derived from the specified I val-
S
ues along with known supply voltage, V
can be calculated as above with the desired signal ampli-
tudes using:
. Load power
Supply
6.8μF
G = 1
-Vs
Figure 3. Unity Gain Circuit
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www.cadeka.com
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