KH561
DATA SHEET
For the circuit of Figure 1, the equivalent input noise
voltage may be calculated using the data sheet spot
noises and R
s
= 25Ω, R
L
=
∞.
Recall that 4kT = 16E-21J.
All terms cast as (nV/√Hz)
2
V
i
R
s
+
C
x
R'
o
= R
x
+ R
o
R
x
V
o
R
L
R
o
= R'
o
- R
x
KH561
-
R
f
R
g
e
n
=
(
2.1
)
2
+
(
.07
)
2
+
(
.632
)
2
+
(
1.22
)
2
+
(
.759
)
2
+
(
.089
)
2
=
2.62nV/ Hz
Gain Accuracy (DC):
A classical op amp’s gain accuracy is principally set by
the accuracy of the external resistors. The KH561
also depends on the internal characteristics of the
forward current gain and inverting input impedance. The
performance equations for A
v
and R
o
along with the
Thevinin model of Figure 5 are the most direct way of
assessing the absolute gain accuracy. Note that internal
temperature drifts will decrease the absolute gain
slightly as the part warms up. Also note that the para-
meter tolerances affect both the signal gain and output
impedance. The gain tolerance to the load must include
both of these effects as well as any variation in the load.
The impact of each parameter shown in the performance
equations on the gain to the load (A
L
) is shown below.
Increasing
Increasing
Increasing
Increasing
current gain G
inverting input R
i
R
f
R
g
Increases A
L
Decreases A
L
lncreases A
L
Decreases A
L
With:
R
o
= KH561 output impedance
and R
o
+ R
x
= R
L
generally
Figure 9: Improving Output Impedance
Match vs. Frequency
Increasing R
x
will decrease the achievable voltage swing
at the load. A minimum R
x
should be used consistent
A
with the desired output match. As discussed in the
thermal analysis discussion, R
x
is also very useful in
limiting the internal power under an output shorted
condition.
Interpreting the Slew Rate:
The slew rate shown in the data sheet applies to the volt-
age swing at the load for the circuit of Figure 1. Twice this
value would be required of a low output impedance
amplifier using an external matching resistor to achieve
the same slew rate at the load.
Layout Suggestions:
The fastest fine scale pulse response settling requires
careful attention to the power supply decoupling.
Generally, the larger electrolytic capacitor ground
connections should be as near the load ground (or cable
shield connection) as is reasonable, while the higher
frequency ceramic de-coupling caps should be as near
the KH561’s supply pins as possible to a low inductance
ground plane.
Evaluation Boards:
An evaluation board (showing a good high frequency lay-
out) for the KH561 is available. This board may be
ordered as part #730019.
Thermal Analysis and Protection
A thermal analysis of a chip and wire hybrid is
directed at determining the maximum junction
temperature of all the internal transistors. From the total
internal power dissipation, a case temperature may be
developed using the ambient temperature and the case
to ambient thermal impedance. Then, each of the
dominant power dissipating paths are considered to
determine which has the maximum rise above case
temperature.
The thermal model and analysis steps are shown below.
As is typical, the model is cast as an electrical model
where the temperatures are voltages, the power dissipa-
tors are current sources, and the thermal impedances
are resistances. Refer to the summary design equations
and Figure 1 for a description of terms.
Applications Suggestions
Driving a Capacitive Load:
The KH561 is particularly suitable for driving a capacitive
load. Unlike a classical op amp (with an inductive output
impedance), the KH561’s output impedance, while
starting out real at the programmed value, goes some-
what capacitive at higher frequencies. This yields a very
stable performance driving a capacitive load. The over-
all response is limited by the (1/RC) bandwidth set by the
KH561’s output impedance and the load capacitance. It
is therefore advantageous to set a low R
o
with the
constraint that extremely low R
f
values will degrade the
distortion performance. R
o
= 25Ω was selected for the
data sheet plots. Note from distortion plots into a
capacitive load that the KH561 achieves better than
60dBc THD (10-bits) driving 2V
pp
into a 50pF load
through 30MHz.
Improving the Output Impedance Match
vs. Frequency - Using R
x
:
Using the loop gain to provide a non-zero output
impedance provides a very good impedance match at
low frequencies. As shown on the
Output Return Loss
plot, however, this match degrades at higher frequencies.
Adding a small external resistor in series with the output,
R
x
, as part of the output impedance (and adjusting the
programmed R
o
accordingly) provides a much better
match over frequency. Figure 9 shows this approach.
REV. 1A January 2004
11
CADEKA [ CADEKA MICROCIRCUITS LLC. ]
