DATA SHEET
KH561
+V
CC
(+15)
SUMMARY DESIGN EQUATIONS AND DEFINITIONS
R
f
=
(
G
+
1
)
R
o
−
A
v
R
i
R
−
R
o
R
g
=
f
A
v
−
1
C
x
=
1
R
o
−
0.08
2
300
1
−
R
g
R
f
– Feedback resistor
from output to inverting
input
R
g
– Gain setting
resistor from inverting
input to ground
C
x
– External
compensation capacitor
from output to
pin 19 (in pF)
6.8µF
V
i
(P
i
)
+
.1µF
4
8
19
C
x
10.5pF
23
R
o
R
L
50Ω
V
o
(P
o
)
R
s
50Ω
18
+
KH561
-
21
R
f
5,10,15,
20
R
g
40Ω
410Ω
Resistor Values
shown result in:
Ro = 50Ω
+
6.8µF
Av = +10
(no-load gain)
A
L
= +5 [14dB]
(gain to 50Ω load)
.1µF
Where:
R
o
– Desired equivalent output impedance
A
v
– Non-inverting input to output voltage
gain with no load
G – Internal current gain from inverting input
to output = 10 ±1%
R
i
– Internal inverting input impedance = 14Ω ±%5
R
s
– Non-inverting input termination resistor
R
L
– Load resistor
A
L
– Voltage gain from non-inverting input to
load resistor
KH561 Description of Operation
Looking at the circuit of Figure 1 (the topology and
resistor values used in setting the data sheet specifica-
tions), the KH561 appears to bear a strong external
resemblance to a classical op amp. As shown in the
simplified block diagram of Figure 2, however, it differs in
several key areas. Principally, the error signal is a
current into the inverting input (current feedback) and the
forward gain from this current to the output is relatively
low, but very well controlled, current gain. The KH561
has been intentionally designed to have a low internal
gain and a current mode output in order that an equivalent
output impedance can be achieved without the series
matching resistor more commonly required of low output
impedance op amps. Many of the benefits of a high loop
gain have, however, been retained through a very careful
control of the KH561’s internal characteristics.
The feedback and gain setting resistors determine both
the output impedance and the gain. R
f
predominately
sets the output impedance (R
o
), while R
g
predominately
determines the no load gain (A
v
). solving for the required
R
f
and R
g
, given a desired R
o
and A
v
, yields the design
equations shown below. Conversely, given an R
f
and R
g
,
the performance equations show that both R
f
and R
g
play
a part in setting R
o
and A
v
. Independent R
o
and A
v
adjustment would be possible if the inverting input imped-
ance (R
i
) were 0 but, with R
i
= 14Ω as shown in the
specification listing, independent gain and output imped-
ance setting is not directly possible.
-V
CC
(-15)
Figure 1: Test Circuit
K
Design Equations
R
f
=
(
G
+
1
)
R
o
−
A
v
R
i
R
g
=
R
f
−
R
o
A
v
−
1
Where:
G
≡
forward current gain
(=10)
R
i
≡
inverting node input
resistance (=14Ω)
R
o
≡
desired output
impedance
A
v
≡
desired non-
inverting voltage
gain with no load
R
R
f
+
R
i
1
+
f
R
g
R
o
=
R
G
+
1
+
i
R
g
R
i
G
−
R
f
R
A
v
=
1
+
f
R
g
G
+
1
+
R
i
R
g
Performance Equations
Simplified Circuit Description
Looking at the KH561’s simplified schematic in Figure 2,
the amplifier’s operation may be described. Going from
the non-inverting input at pin 8 to the inverting input at pin
18, transistors Q1 – Q4 act as an open loop unity gain
buffer forcing the inverting node voltage to follow the non-
inverting voltage input.
Transistors Q3 and Q4 also act as a low impedance (14Ω
looking into pin 18) path for the feedback error current.
This current, (i
err
), flows through those transistors into a
very well defined current mirror having a gain of 10 from
this error current to the output. The current mirror outputs
act as the amplifier output.
The input stage bias currents are supply voltage inde-
pendent. Since these set the bias level for the whole
REV. 1A January 2004
6
CADEKA [ CADEKA MICROCIRCUITS LLC. ]
