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CLC1004IST6X 参数 Datasheet PDF下载

CLC1004IST6X图片预览
型号: CLC1004IST6X
PDF下载: 下载PDF文件 查看货源
内容描述: 单路和三路, 750MHz的放大器,具有禁用 [Single and Triple, 750MHz Amplifiers with Disable]
分类和应用: 放大器
文件页数/大小: 20 页 / 2474 K
品牌: CADEKA [ CADEKA MICROCIRCUITS LLC. ]
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Data Sheet  
perature, the package thermal resistance value Theta  
Application Information  
JA  
(Ө ) is used along with the total die power dissipation.  
JA  
Basic Operation  
T
= T  
+ (Ө × P )  
Junction  
Ambient JA D  
Figures 1 and 2 illustrate typical circuit configurations for  
non-inverting, inverting, and unity gain topologies for dual  
supply applications. They show the recommended bypass  
capacitor values and overall closed loop gain equations.  
Where T  
is the temperature of the working environment.  
Ambient  
In order to determine P , the power dissipated in the load  
needs to be subtracted from the total power delivered by  
D
the supplies.  
+Vs  
6.8μF  
P = P  
- P  
load  
D
supply  
Supply power is calculated by the standard power equa-  
0.1μF  
tion.  
Input  
+
-
Output  
P
= V  
× I  
supply  
supply RMS supply  
RL  
V
= V - V  
S+ S-  
supply  
0.1μF  
6.8μF  
Rf  
Power delivered to a purely resistive load is:  
Rg  
2
P
= ((V  
)
)/Rload  
eff  
load  
LOAD RMS  
G = 1 + (Rf/Rg)  
-Vs  
The effective load resistor (Rload ) will need to include  
eff  
the effect of the feedback network. For instance,  
Figure 1. Typical Non-Inverting Gain Circuit  
Rload in figure 3 would be calculated as:  
eff  
+Vs  
6.8μF  
R || (R + R )  
L
f
g
These measurements are basic and are relatively easy to  
perform with standard lab equipment. For design purposes  
however, prior knowledge of actual signal levels and load  
impedance is needed to determine the dissipated power.  
R1  
0.1μF  
+
Output  
Rg  
Input  
-
RL  
Here, P can be found from  
0.1μF  
D
Rf  
P = P  
+ P  
- P  
D
Quiescent  
Dynamic Load  
6.8μF  
G = - (Rf/Rg)  
-Vs  
Quiescent power can be derived from the specified I val-  
ues along with known supply voltage, V  
S
For optimum input offset  
voltage set R1 = Rf || Rg  
. Load power  
Supply  
can be calculated as above with the desired signal ampli-  
tudes using:  
Figure 2. Typical Inverting Gain Circuit  
(V  
)
= V  
/ √2  
LOAD RMS  
PEAK  
Power Dissipation  
( I  
)
= ( V  
)
/ Rload  
LOAD RMS  
LOAD RMS eff  
Power dissipation should not be a factor when operating  
under the stated 1000 ohm load condition. However, ap-  
plications with low impedance, DC coupled loads should  
be analyzed to ensure that maximum allowed junction  
temperature is not exceeded. Guidelines listed below can  
be used to verify that the particular application will not  
cause the device to operate beyond it’s intended operat-  
ing range.  
The dynamic power is focused primarily within the output  
stage driving the load. This value can be calculated as:  
P
= (V - V  
)
× ( I )  
LOAD RMS  
DYNAMIC  
S+  
LOAD RMS  
Assuming the load is referenced in the middle of the pow-  
er rails or V /2.  
supply  
Figure 3 shows the maximum safe power dissipation in  
the package vs. the ambient temperature for the pack-  
ages available.  
Maximum power levels are set by the absolute maximum  
junction rating of 150°C. To calculate the junction tem-  
©2007-2008 CADEKA Microcircuits LLC  
www.cadeka.com  
15