欢迎访问ic37.com |
会员登录 免费注册
发布采购

CDK8307AILP64 参数 Datasheet PDF下载

CDK8307AILP64图片预览
型号: CDK8307AILP64
PDF下载: 下载PDF文件 查看货源
内容描述: 12月13日位,四十零分之二十零/ 50/ 65 / 80MSPS ,八通道,超低功耗ADC LVDS [12/13-bit, 20/40/50/65/80MSPS, Eight Channel, Ultra Low Power ADC with LVDS]
分类和应用:
文件页数/大小: 31 页 / 1408 K
品牌: CADEKA [ CADEKA MICROCIRCUITS LLC. ]
 浏览型号CDK8307AILP64的Datasheet PDF文件第3页浏览型号CDK8307AILP64的Datasheet PDF文件第4页浏览型号CDK8307AILP64的Datasheet PDF文件第5页浏览型号CDK8307AILP64的Datasheet PDF文件第6页浏览型号CDK8307AILP64的Datasheet PDF文件第8页浏览型号CDK8307AILP64的Datasheet PDF文件第9页浏览型号CDK8307AILP64的Datasheet PDF文件第10页浏览型号CDK8307AILP64的Datasheet PDF文件第11页  
Data Sheet
Pin Assignments - TQFP
Pin No.
TQFP
1, 7, 14, 47, 54, 60, 63, 70
4, 8, 11, 50, 53, 57, 68, 73, 74,
79, 80
2
3
5
6
9
10
12
13
48
49
51
52
55
56
58
59
15, 17, 18, 26, 36, 43, 44, 46
25, 35
16
19
20
21
22
23
24
27
28
29
30
31
32
33
34
37
38
39
40
AVDD
AVSS
IP1
IN1
IP2
IN2
IP3
IN3
IP4
IN4
IP5
IN5
IP6
IN6
IP7
IN7
IP8
IN8
DVSS
DVDD
PD
LCKP
LCKN
D1P
D1N
D2P
D2N
D3P
D3N
D4P
D4N
D5P
D5N
D6P
D6N
D7P
D7N
D8P
D8N
Analog power supply, 1.8V
Pin Name
Description
CDK8307
12/13-bit, 20/40/50/65/80MSPS, Eight Channel, Ultra Low Power ADC with LVDS
Analog ground
Positive differential input signal, channel 1
Negative differential input signal, channel 1
Positive differential input signal, channel 2
Negative differential input signal, channel 2
Positive differential input signal, channel 3
Negative differential input signal, channel 3
Positive differential input signal, channel 4
Negative differential input signal, channel 4
Positive differential input signal, channel 5
Negative differential input signal, channel 5
Positive differential input signal, channel 6
Negative differential input signal, channel 6
Positive differential input signal, channel 7
Negative differential input signal, channel 7
Positive differential input signal, channel 8
Negative differential input signal, channel 8
Digital ground
Digital and I/O power supply, 1.8V
Power-down input. Activate after applying power in order to initialize the
ADC correctly. Alternatively use the SPI power down feature.
LVDS bit clock, positive output
LVDS bit clock, negative output
LVDS channel 1, positive output
LVDS channel 1, negative output
LVDS channel 2, positive output
LVDS channel 2, negative output
LVDS channel 3, positive output
LVDS channel 3, negative output
LVDS channel 4, positive output
LVDS channel 4, negative output
LVDS channel 5, positive output
LVDS channel 5, negative output
LVDS channel 6, positive output
LVDS channel 6, negative output
LVDS channel 7, positive output
LVDS channel 7, negative output
LVDS channel 8, positive output
LVDS channel 8, negative output
Rev 1A
©2009 CADEKA Microcircuits LLC
www.cadeka.com
7