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CDK3401CTQ48Y 参数 Datasheet PDF下载

CDK3401CTQ48Y图片预览
型号: CDK3401CTQ48Y
PDF下载: 下载PDF文件 查看货源
内容描述: 10位, 100 / 150MSPS ,三路视频数模转换器 [10-bit, 100/150MSPS, Triple Video DACs]
分类和应用: 转换器数模转换器
文件页数/大小: 11 页 / 962 K
品牌: CADEKA [ CADEKA MICROCIRCUITS LLC. ]
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Data Sheet  
Absolute Maximum Ratings  
The safety of the device is not guaranteed when it is operated above the “Absolute Maximum Ratings. The device  
should not be operated at these “absolute” limits. Adhere to the “Recommended Operating Conditions” for proper device  
function. The information contained in the Electrical Characteristics tables and Typical Performance plots reflect the  
operating conditions noted on the tables and plots.  
Parameter  
Min  
Max  
Unit  
Power Supply Voltage  
V
DD  
(Measured to GND)  
-0.5  
7.0  
V
Inputs  
Applied Voltage (measured to GND)(2)  
Forced Current(3,4)  
-0.5  
V
V
+ 0.5  
V
DD  
-10.0  
10.0  
mA  
Outputs  
Applied Voltage (measured to GND)(2)  
Forced Current(3,4)  
-0.5  
+ 0.5  
V
DD  
-60.0  
60.0  
mA  
sec  
Short Circuit Duration (single output in HIGH state to GND)  
Temperature  
Infinite  
Operating, Ambient  
-20  
110  
150  
300  
220  
150  
°C  
°C  
°C  
°C  
°C  
Junction  
Lead Soldering (10 seconds)  
Vapor Phase Soldering (1 minute)  
Storage  
-65  
nꢁꢇꢆꢉ:  
1. Functional operation under any of these conditions is NOT implied. Performance and reliability are guaranteed only if Operating Conditions are not exceeded.  
2. Applied voltage must be current limited to specified range.  
3. Forcing voltage must be limited to specified range.  
4. Current is specified as conventional current flowing into the device.  
Recommended Operating Conditions  
Symbol  
VDD  
Parameter  
Min  
Typ  
5.0  
Max  
Unit  
Power Supply Voltage  
4.75  
5.25  
100  
150  
V
MSPS  
MSPS  
ns  
CDK3400  
CDK3401  
CDK3400  
CDK3401  
CDK3400  
CDK3401  
CDK3400  
CDK3401  
fS  
Conversion Rate  
3.1  
2.5  
3.1  
2.5  
10  
tPWH  
tPWL  
tW  
CLK Pulsewidth, HIGH  
CLK Pulsewidth, LOW  
CLK Pulsewidth  
ns  
ns  
ns  
ns  
6.6  
1.7  
0
ns  
tS  
Input Data Setup Time  
Input Date Hold Time  
Reference Voltage, External  
Compensation Capacitor  
Output Load  
ns  
th  
ns  
VREF  
CC  
RL  
1.0  
1.235  
0.1  
1.5  
V
µF  
Ω
37.5  
VIH  
VIL  
TA  
Input Voltage, Logic HIGH  
Input Voltage, Logic LOW  
Ambient Temperature, Still Air  
2.0  
GND  
0
VDD  
0.8  
70  
V
V
°C  
©2008 CADEKA Microcircuits LLC  
www.cadeka.com  
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