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CDK1306CTQ32 参数 Datasheet PDF下载

CDK1306CTQ32图片预览
型号: CDK1306CTQ32
PDF下载: 下载PDF文件 查看货源
内容描述: 10位, 40 MSPS 160MW A / D转换器 [10-bit, 40 MSPS 160mW A/D Converter]
分类和应用: 转换器
文件页数/大小: 11 页 / 1296 K
品牌: CADEKA [ CADEKA MICROCIRCUITS LLC. ]
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Data Sheet  
iꢆꢅꢄgꢃꢂꢁ lꢇꢆꢄꢂꢃꢇꢅy eꢃꢃꢀꢃ (ile)  
Specification Definitions  
Linearity error refers to the deviation of each individual  
code (normalized) from a straight line drawn from –FS  
through +FS. The deviation is measured from the edge of  
each particular code to the true straight line.  
aꢉꢄꢃꢅꢊꢃꢄ Dꢄꢁꢂy  
Aperture delay represents the point in time, relative to  
the rising edge of the CLOCK input, that the analog input  
is sampled.  
oꢊꢅꢉꢊꢅ Dꢄꢁꢂy  
aꢉꢄꢃꢅꢊꢃꢄ Jꢇꢅꢅꢄꢃ  
Time between the clock’s triggering edge and output data  
valid.  
The variations in aperture delay for successive samples.  
Dꢇꢋꢋꢄꢃꢄꢆꢅꢇꢂꢁ Gꢂꢇꢆ (DG)  
ovꢄꢃvꢀꢁꢅꢂgꢄ rꢄꢌꢀvꢄꢃy tꢇmꢄ  
A signal consisting of a sine wave superimposed on vari-  
ous DC levels is applied to the input. Differential gain is  
the maximum variation in the sampled sine wave ampli-  
tudes at these DC levels.  
The time required for the ADC to recover to full accuracy  
after an analog input signal 125% of full scale is reduced  
to 50% of the full-scale value.  
sꢇgꢆꢂꢁ-tꢀ-nꢀꢇꢈꢄ rꢂꢅꢇꢀ (snr)  
Dꢇꢋꢋꢄꢃꢄꢆꢅꢇꢂꢁ phꢂꢈꢄ (Dp)  
The ratio of the fundamental sinusoid power to the total  
noise power. Harmonics are excluded.  
A signal consisting of a sine wave superimposed on vari-  
ous DC levels is applied to the input. Differential phase is  
the maximum variation in the sampled sine wave phases  
at these DC levels.  
sꢇgꢆꢂꢁ-tꢀ-nꢀꢇꢈꢄ aꢆd Dꢇꢈꢅꢀꢃꢅꢇꢀꢆ (sinaD)  
The ratio of the fundamental sinusoid power to the total  
noise and distortion power.  
eꢋꢋꢄꢌꢅꢇvꢄ nꢊmbꢄꢃ oꢋ Bꢇꢅꢈ (enoB)  
SINAD = 6.02N + 1.76, where N is equal to the effective  
number of bits.  
tꢀꢅꢂꢁ Hꢂꢃmꢀꢆꢇꢌ Dꢇꢈꢅꢀꢃꢅꢇꢀꢆ (tHD)  
The ratio of the total power of the first 9 harmonics to the  
power of the measured sinusoidal signal.  
N = SINAD – 1.76  
6.02  
iꢆꢉꢊꢅ Bꢂꢆdwꢇdꢅh  
sꢉꢊꢃꢇꢀꢊꢈ fꢃꢄꢄ Dyꢆꢂmꢇꢌ rꢂꢆgꢄ (sfDr)  
Small signal (50mV) bandwidth (3dB) of analog input stage.  
The ratio of the fundamental sinusoidal amplitude to the  
single largest harmonic or spurious signal.  
Dꢇꢋꢋꢄꢃꢄꢆꢅꢇꢂꢁ lꢇꢆꢄꢂꢃꢇꢅy eꢃꢃꢀꢃ (Dle)  
Error in the width of each code from its theoretical value.  
N
(Theoretical = V /2 )  
FS  
Figure 1. Timing Diagram 1  
©2008 CADEKA Microcircuits LLC  
www.cadeka.com  
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