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CDK1306CSO28 参数 Datasheet PDF下载

CDK1306CSO28图片预览
型号: CDK1306CSO28
PDF下载: 下载PDF文件 查看货源
内容描述: 10位, 40 MSPS 160MW A / D转换器 [10-bit, 40 MSPS 160mW A/D Converter]
分类和应用: 转换器
文件页数/大小: 11 页 / 1296 K
品牌: CADEKA [ CADEKA MICROCIRCUITS LLC. ]
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Data Sheet
Electrical Characteristics
(T
A
= T
Min
to T
Max
, AV
DD
= DV
DD
= OV
DD
= +5V, V
IN
= 0 to 4V, ƒ
clk
= 40 MSPS, V
RHS
= 4V, V
RLS
= 0V; unless otherwise noted)
symbol
parameter
Resolution
conditions
Min
10
-0.5
-1.0
typ
Max
units
bits
DC Performance
CDK1306
10-bit, 40 MSPS 160mW A/D Converter
DLE
ILE
Differential Linearity Error
(1)
Integral Linearity Error
(1)
No Missing Codes
+0.5
+1.0
Guaranteed
LSB
LSB
Analog Input
Input Voltage Range
(1)
Input Resistance
(2)
Input Capacitance
Input Bandwidth
Gain Error
Offset Error
Small Signal
V
RLS
50
5
250
±2.0
±2.0
200
Small Signal
V
RLS
(2)
V
RHS
(2)
Voltage Range
V
RHS
– V
RLS
Δ (V
RHF
– V
RHS
)
Δ (V
RLS
– V
RLF
)
0
3.0
4.0
90
75
15
20
40
2
12
4.0
15
ƒ
IN
= 3.58MHz
ƒ
IN
= 10.3MHz
ƒ
IN
= 3.58MHz
(1)
ƒ
IN
= 10.3MHz
(1)
ƒ
IN
= 3.58MHz ,
9 distortion bins from 1024 pt FFT
ƒ
IN
= 10.3MHz
(1)
,
9 distortion bins from 1024 pt FFT
ƒ
IN
= 3.58MHz
(1)
(1)
V
RHS
V
pF
MHz
LSB
LSB
Reference Input
Resistance
(1)
Bandwidth
400
150
2.0
AV
DD
600
Ω
MHz
V
V
V
mV
mV
CLK Cycle
CLK Cycle
MHz
MHz
CLK Cycle
ns
ps
pp
Bits
Bits
dB
dB
dB
dB
dB
dB
dB
deg
%
Reference Settling Time
V
RHS
V
RLS
Conversion Characteristics
Maximum Conversion Rate
(1)
Minimum Conversion Rate
(2)
Pipeline Delay (Latency)
Aperture Delay Time
Aperture Jitter Time
(2)
REV 1A
Dynamic Performance
ENOB
SNR
Effective Number of Bits
Signal-to-Noise Ratio w/o Harmonics
9.2
8.8
56
55
61
56
54
53
58
57
63
58
57
55
64
±0.3
±0.3
THD
Total Harmonic Distortion
SINAD
SFDR
Signal-to-Noise and Distortion
Spurious Free Dynamic Range
Differential Phase
Differential Gain
ƒ
IN
= 10.3MHz
ƒ
IN
= 1MHz
(1)
notes:
1. 100% production tested at +25°C.
2. Parameter is guaranteed (but not tested) by design and characterization data.
©2008 CADEKA Microcircuits LLC
www.cadeka.com
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