4.6 Advanced Chipset Setup
This section allows you to configure the system based on the specific
features of the installed chipset. This chipset manages bus speeds and
the access to the system memory resources, such as DRAM and the
external cache. It also coordinates the communications between the
conventional ISA and PCI buses. It must be stated that these items
should never be altered. The default settings have been chosen
because they provide the best operating conditions for your system.
You might consider and make any changes only if you discover that the
data has been lost while using your system.
AMIBIOS SETUP – ADVANCED CHIPSET SETUP
(C)2001 American Megatrends, Inc. All Rights Reserved
******** DRAM Timing ********
Configure SDRAM Timing by SPD
DRAM Frequency
Available Options:
` Disabled
Enabled
Disabled
133Mhz
3
SDRAM CAS# Latency
DRAM Bank Interleave
Memory Hole
AGP Mode
Enabled
Disabled
4x
AGP Read Synchronization
AGP Fast Write
Enabled
Disabled
64MB
Disabled
Disabled
Yes
Enabled
PCI CLK/4
All USB Port
Disabled
Disabled
AGP Aperture Size
AGP Master 1 W/S Write
AGP Master 1 W/S Read
Search for MDA Resources
PCI Delay Transaction
ISA Bus Clock
USB Controller
USB Device Legacy Support
Port 64/60 Emulation
ꢄꢅ
ESC:Exit
:Sel
PgUp/PgDn: Modify
F1:Help
F2/F3:Color
41
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