Data Sheet
2W STEREO AUDIO POWER AMPLIFIER WITH SHUTDOWN
AA4003
Application Information
COUT
220μF
+
_
Left Out-
+
SE/BTL Mode, HP_SENSE Pin
RPD
1.5kΩ
20kΩ
20kΩ
Headphone
Speak
AMP1L
The AA4003 can operate under 2 types of output
configuration, BTL (Bridged-Tied-Load) mode and SE
(Single-Ended) mode, determined by HP_SENSE pin's
logic level. (Here is the discussion about left channel
only, it equally applies to right channel.)
Main
Speak
_
Left Out+
+
AMP2L
R1
R2
VDD
100kΩ 100kΩ
COUT
220μF
_
+
HP_SENSE= High Level
+
Left Out-
RPD
1.5kΩ
20kΩ
Figure 20. Output Configuration for Left Channel
in SE Mode
20kΩ
AMP1L
Main
Speak
_
When headphone plug is not inserted, the voltage of
HP_SENSE pin is determined by voltage divider
Left Out+
+
AMP2L
formed by R1 and R . For given resistor's value in
PD
R1
R2
VDD
Figure 19, R1=100kΩ, R =1.5kΩ, DC voltage at
100kΩ 100kΩ
PD
HP_SENSE is about 74mV. AC signal equals output
SLEEVE
HP_SENSE= Low Level
amplitude of OUT- through C
, so signal at
HEADPHONE
JACK
OUT
HP_SENSE node is 74mV DC plus AC signal. The
maximum peak-to-peak voltage at OUT- is no greater
Figure 19. Output Configuration for Left Channel
in BTL Mode
than V
(supply voltage 5.0V), so the positive
DD
maximum voltage of HP_SENSE node will be no
greater than 2.5V+75mV≈2.575V, which is less than
HP_SENSE input high level minimum value (4.0V).
That means the chip is in BTL mode and there is no
risk of operation mode switch between SE and BTL.
When HP_SENSE pin is held low which sets the chip
in BTL mode, the AMP2L unit is turned on. AMP2L
has fixed unity gain internally, AC signal at OUT+ is
180 degree phase shifted from OUT-. Because the DC
component (Output Bias voltage, approx 1/2 V
)
DD
When headphone plug is inserted, as the R
is
PD
between OUT+ and OUT- is canceled, there is no
necessity to use DC block capacitors for main speak. In
BTL mode, output voltage swing across main speaker
is about 2 times that in SE mode, so there is 4 times
output power compared to SE mode with same load
and input. (see Figure 19)
disconnected from R1, the voltage of HP_SENSE pin
is pulled up by R1 to V
and sets the chip in SE
DD
mode.
HP_SENSE pin can also be connected to MCU I/O
port to control the mode switch through MCU.
If applying high level to HP_SENSE pin which sets the
chip in SE mode, the AMP2L unit is in high impedance
state. There is no current loop between OUT+ and
OUT-, the main speak is naturally disabled without any
hardware change. The output audio signal rides on bias
voltage at OUT- (Output Bias voltage, approx 1/2
It is necessary to note that AA4003 still can drive
headphone even in BTL mode because OUT- is always
active whatever the chip is in SE or BTL mode.
C , C
, Cb and C (Power Supply) Selection
S
IN
OUT
For input stages of AA4003, input capacitors C is used
I
V
) , so it has to use a capacitor C
to block DC
DD
OUT
to accommodate different DC level between input
source and AA4003 bias voltage (about 2.31V). Input
bias and couple AC signal to headphone speak. (See
Figure 20)
capacitors C and input resistors R form a first order
I
I
High Pass Filter, which determines the lower corner
frequency according to the classic equation below,
It is recommended to connect HP_SENSE to the
headphone jack switch pin illustrated in Figure 19.
Oct. 2007 Rev. 1. 1
BCD Semiconductor Manufacturing Limited
11
BCDSEMI [ BCD SEMICONDUCTOR MANUFACTURING LIMITED ]
