TSC2005
www.ti.com
SBAS379–DECEMBER 2006
LAYOUT
The following layout suggestions should obtain optimum performance from the TSC2005. However, many
portable applications have conflicting requirements concerning power, cost, size, and weight. In general, most
portable devices have fairly clean power and grounds because most of the internal components are very low
power. This situation would mean less bypassing for the converter power and less concern regarding grounding.
Still, each situation is unique and the following suggestions should be reviewed carefully.
For optimum performance, care should be taken with the physical layout of the TSC2005 circuitry. The basic
SAR architecture is sensitive to glitches or sudden changes on the power supply, reference, ground
connections, and digital inputs that occur just prior to latching the output of the analog comparator. Therefore,
during any single conversion for an n-bit SAR converter, there are n windows in which large external transient
voltages can easily affect the conversion result. Such glitches might originate from switching power supplies,
nearby digital logic, and high power devices. The degree of error in the digital output depends on the reference
voltage, layout, and the exact timing of the external event. The error can change if the external event changes in
time with respect to the SCLK input.
With this in mind, power to the TSC2005 should be clean and well-bypassed. A 0.1µF ceramic bypass capacitor
should be added between (SNSVDD to AGND and SNSGND) or (I/OVDD to DGND). A 0.1µF decoupling
capacitor between VREF to AGND is also needed unless the SNSVDD is used as a reference input and is
connected to VREF. These capacitors need to be placed as close to the device as possible. A 1µF to 10µF
capacitor may also be needed if the impedance of the connection between SNSVDD and the power supply is
high. The I/OVDD needs to be shorted to the same supply plane as the SNSVDD. Short both SNSVDD and
I/OVDD to the analog VDD plane.
The TSC2005 architecture offers no inherent rejection of noise or voltage variation in regards to using an
external reference input, which is of particular concern when the reference input is tied to the power supply. Any
noise and ripple from the supply will appear directly in the digital results. While high-frequency noise can be
filtered out, voltage variation due to line frequency (50Hz or 60Hz) can be difficult to remove. Some package
options have pins labeled as VOID. Avoid any active trace going under those pins marked as VOID unless they
are shielded by a ground or power plane.
All GND (AGND, DGND, SUBGND and SNSGND) pins should be connected to a clean ground point. In many
cases, this point will be the analog ground. Avoid connections that are too near the grounding point of a
microcontroller or digital signal processor. If needed, run a ground trace directly from the converter to the
power-supply entry or battery connection point. The ideal layout includes an analog ground plane dedicated to
the converter and associated analog circuitry.
In the specific case of use with a resistive touch screen, care should be taken with the connection between the
converter and the touch screen. Since resistive touch screens have fairly low resistance, the interconnection
should be as short and robust as possible. Loose connections can be a source of error when the contact
resistance changes with flexing or vibrations.
As indicated previously, noise can be a major source of error in touch-screen applications (for example,
applications that require a back-lit LCD panel). This electromagnetic interfence (EMI) noise can be coupled
through the LCD panel to the touch screen and cause flickering of the converted ADC data. Several things can
be done to reduce this error, such as using a touch screen with a bottom-side metal layer connected to ground,
which will couple the majority of noise to ground. Additionally, filtering capacitors, from Y+, Y–, X+, and X– to
ground, can also help. Note, however, that the use of these capacitors increases screen settling time and
requires longer panel voltage stabilization times, and also increases precharge and sense times for the
PINTADV circuitry of the TSC2005. The resistor value varies depending on the touch screen sensor used. The
internal 51kΩ resistor (RIRQ) may be adequate for most of sensors.
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