SPECIFICATIONS
At TA = +25°C, VS = ±15V, RL = 2kΩ unless otherwise noted.
PGA206P, U
PGA207P, U
PGA206PA, UA
PGA207PA, UA
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
INPUT
Offset Voltage, RTI
Initial
All Gains
TA = +25°C
A = TMIN to TMAX, G = 8, 10
±0.5
±2
±5
±1.5
±20
±1
✻
±10
✻
✻
✻
±2.5
±40
mV
µV/°C
µV/V
µV/mo
Ω || pF
Ω || pF
V
vs Temperature
T
vs Power Supply
Long-Term Stability
Impedance, Differential
Common-Mode
Common-Mode Voltage Range(1)
Safe Input Voltage
Common-Mode Rejection
V
S = ±4.5V to ±18V
4.5
1013 || 1
1012 || 4
±(|VS| –2.5)
VO = 0V
±(|VS|–4)
✻
✻
±40
✻
V
V
CM = ±11V, ∆RS = 1kΩ
G = 1
G = 2
G = 4 or 5
G = 8 or 10
80
85
90
95
92
96
100
100
75
80
84
84
86
90
94
94
dB
dB
dB
dB
INPUT BIAS CURRENT
vs Temperature
Offset Current
VIN = 0
2
100
100
✻
✻
✻
✻
✻
✻
pA
pA
See Typical Curve
1
See Typical Curve
vs Temperature
NOISE VOLTAGE, RTI
f = 10Hz
f = 100Hz
G = 8,10; RS = 0Ω
30
20
18
1
✻
✻
✻
✻
nV/√Hz
nV/√Hz
nV/√Hz
µVp-p
f = 1kHz
fB = 0.1Hz to 10Hz
Noise Current
f = 1kHz
1.5
✻
fA/√Hz
GAIN
All Gains, VO = ±11V
Gain Error
Gain vs Temperature(2)
Nonlinearity
±0.01
±1
±0.0003
±0.05
±10
±0.002
✻
✻
✻
±0.1
✻
±0.005
%
ppm/°C
% of FSR
OUTPUT
Voltage, Positive
Negative
Load Capacitance Stability
Short-Circuit Current
(V+) –4
(V–) +4
(V+) –2.3
(V–) +1.5
1000
✻
✻
✻
✻
✻
✻
V
V
pF
mA
±17
FREQUENCY RESPONSE
Bandwidth, –3dB
G = 1
G = 2
G = 4, 5
5
4
1.3
600
25
2
✻
✻
✻
✻
✻
✻
✻
✻
MHz
MHz
MHz
kHz
V/µs
µs
G = 8, 10
Slew Rate
Settling Time, 0.1%
0.01%
V
O = ±10V, G = 1 to 10
20V Step, All Gains
20V Step, All Gains
50% Overdrive
3.5
1.5
µs
µs
Output Overload Recovery
DIGITAL LOGIC INPUTS
Digital Ground Voltage, VDG
Digital Low Voltage
V–
V–
(V+) –4
DG + 0.8V
✻
✻
✻
✻
V
V
V
Digital Input Current
Digital High Voltage
Gain Switching Time
1
✻
✻
pA
V
ns
VDG+2
V+
✻
✻
500
POWER SUPPLY
Voltage Range
Current
±4.5
±15
+12.4/–11.2
±18
±13.5
✻
✻
✻
✻
V
mA
VIN = 0V
TEMPERATURE RANGE
Specification
Operating
–40
–40
+85
+125
✻
✻
✻
✻
°C
°C
Thermal Resistance, θJA
80
✻
°C/W
✻ Specification same as PGA206P or PGA207P.
NOTES: (1) Input common-mode range varies with output voltage—see typical curves. (2) Guaranteed by wafer test.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
2
PGA206/207
BB [ BURR-BROWN CORPORATION ]
