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OPA2652UG4 参数 Datasheet PDF下载

OPA2652UG4图片预览
型号: OPA2652UG4
PDF下载: 下载PDF文件 查看货源
内容描述: 双通道, 700MHz的,电压反馈运算放大器 [Dual, 700MHz, Voltage-Feedback OPERATIONAL AMPLIFIER]
分类和应用: 运算放大器光电二极管
文件页数/大小: 20 页 / 508 K
品牌: BB [ BURR-BROWN CORPORATION ]
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OPA2652  
www.ti.com  
SBOS125AJUNE 2000REVISED MAY 2006  
This absolute worst-case condition meets the  
specified maximum junction temperature. Actual PDL  
will almost always be less than that considered here.  
Carefully consider maximum TJ in your application.  
+5V  
Supply Decoupling  
Not Shown  
1/2  
OPA2652  
VO  
0.1mF  
328W  
BOARD LAYOUT GUIDELINES  
Achieving  
optimum  
performance  
with  
a
high-frequency amplifier such as the OPA2652  
requires careful attention to board layout parasitics  
and external component types. Recommendations  
that will optimize performance include:  
-5V  
RF  
+5V  
RG  
500W  
1kW  
VI  
5kW  
5kW  
±200mV Output Adjustment  
20kW  
a) Minimize parasitic capacitance to any AC  
ground for all of the signal I/O pins. Parasitic  
capacitance on the output and inverting input pins  
can cause instability: on the noninverting input, it can  
react with the source impedance to cause  
unintentional bandlimiting. To reduce unwanted  
capacitance, a window around the signal I/O pins  
should be opened in all of the ground and power  
planes around those pins. Otherwise, ground and  
power planes should be unbroken elsewhere on the  
board.  
10kW  
0.1mF  
VO  
VI  
RF  
= -  
= -2  
RG  
-5V  
Figure 36. DC-Coupled, Inverting Gain of –2, with  
Offset Adjustment  
Thermal Analysis  
b) Minimize the distance (< 0.25") from the  
power-supply pins to high-frequency 0.1µF  
decoupling capacitors. At the device pins, the ground  
and power plane layout should not be in close  
proximity to the signal I/O pins. Avoid narrow power  
and ground traces to minimize inductance between  
the pins and the decoupling capacitors. The  
power-supply connections should always be  
decoupled with these capacitors. An optional supply  
decoupling capacitor (0.1µF) across the two power  
supplies (for bipolar operation) will improve 2nd  
harmonic distortion performance. Larger (2.2µF to  
6.8µF) decoupling capacitors, effective at lower  
frequency, should also be used on the main supply  
pins. These capacitors may be placed somewhat  
farther from the device and may be shared among  
several devices in the same area of the PCB.  
Heatsinking or forced airflow may be required under  
extreme operating conditions. Maximum desired  
junction temperature will set the maximum allowed  
internal power dissipation as described below. In no  
case should the maximum junction temperature be  
allowed to exceed 175°C.  
Operating junction temperature (TJ) is given by TA +  
PD • θJA. The total internal power dissipation (PD) is  
the sum of quiescent power (PDQ) and additional  
power dissipated in the output stage (PDL) to deliver  
load power. Quiescent power is simply the specified  
no-load supply current times the total supply voltage  
across the part. PDL depends on the required output  
signal and load; for a grounded resistive load, PDL is  
at a maximum when the output is fixed at a voltage  
equal to 1/2 of either supply voltage (for equal  
bipolar supplies). Under this condition, PDL  
VS /(4 RL) where RL includes feedback network  
=
2
c) Careful selection and placement of external  
components will preserve the high frequency  
performance of the OPA2652. Resistors should be  
a very low reactance type. Surface-mount resistors  
work best and allow a tighter overall layout. Metal  
film or carbon composition axiallyleaded resistors  
can also provide good high frequency performance.  
Again, keep resistor leads and PCB traces as short  
as possible. Never use wirewound type resistors in a  
high-frequency application. Since the output pin and  
inverting input pin are the most sensitive to parasitic  
capacitance, always position the feedback and series  
output resistor, if any, as close as possible to the  
output pin. Other network components, such as  
noninverting input termination resistors, should also  
be placed close to the package. Where double-side  
component mounting is allowed, place the feedback  
resistor directly under the package on the other side  
loading.  
Note that it is the power in the output stage, and not  
into the load, that determines internal power  
dissipation.  
As an example, compute the maximum TJ using an  
OPA2652E (SOT23-8 package) in the circuit of  
Figure 28 operating at the maximum specified  
ambient temperature of +85°C and with both outputs  
driving 2.5VDC into a grounded 100load.  
PD = 10V 15.5mA + 2 [52/(4 [100804])] =  
296mW  
Maximum TJ = +85°C + (0.30W 150°C/W) = 130°C  
16  
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