OPA2652
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SBOS125A–JUNE 2000–REVISED MAY 2006
error, as a result of the input bias currents, is
reduced to (Input Offset Current) • RF. If the 50Ω
source impedance is DC-coupled in Figure 29, the
total resistance to ground on the inverting input will
be 429Ω. Combining this in parallel with the
feedback resistor gives 208Ω, which is close to the
RB = 205Ω used in Figure 29. To reduce the
additional high-frequency noise introduced by this
resistor, it is sometimes bypassed with a capacitor.
As long as RB <300Ω, the capacitor is not required
since its total noise contribution is much less than
that of the op amp input noise voltage.
directly on the output pin. When the amplifier
open-loop output resistance is considered, this
capacitive load introduces an additional pole in the
signal path that can decrease the phase margin.
Several external solutions to this problem have been
suggested. When the primary considerations are
frequency response flatness, pulse response fidelity,
and/or distortion, the simplest and most effective
solution is to isolate the capacitive load from the
feedback loop by inserting a series isolation resistor
between the amplifier output and the capacitive load.
This resistor does not eliminate the pole from the
loop response, but rather shifts it and adds a zero at
a higher frequency. The additional zero acts to
cancel the phase lag from the capacitive load pole,
thus increasing the phase margin and improving
stability.
Output Current and Voltage
The OPA2652 specifications in the spec table,
though familiar in the industry, consider voltage and
current limits separately. In many applications, it is
the voltage • current, or VI product, that is more
relevant to circuit operation. Refer to the Output
Voltage and Current Limitations plot in the Typical
Characteristics. The X and Y axes of this graph show
the zero-voltage output current limit and the zero
current output voltage limit, respectively. The four
quadrants give a more detailed view of the device
output drive capabilities, noting that the graph is
bounded by a Safe Operating Area of 1W maximum
internal power dissipation (500mW for each
channel). Superimposing resistor load lines onto the
plot shows that the OPA2652 can drive ±2.2V into
50Ω or ±2.5V into 100Ω without exceeding the output
capabilities, or the 1W dissipation boundary line.
The Typical Characteristics show the recommended
RS versus capacitive load and the resulting
frequency response at the load. Parasitic capacitive
loads greater than 2pF can begin to degrade the
performance of the OPA2652. Long PCB traces,
unmatched cables, and connections to multiple
devices can easily exceed this value. Always
consider this effect carefully, and add the
recommended series resistor as close as possible to
the OPA2652 output pin (see Board Layout
Guidelines).
Distortion Performance
The OPA2652 provides good distortion performance
into a 100Ω load on ±5V supplies. Increasing the
load impedance improves distortion directly.
Remember that the total load includes the feedback
To maintain maximum output stage linearity, no
output short-circuit protection is provided. This
configuration will not normally be a problem since
most applications include a series matching resistor
at the output that limits the internal power dissipation
if the output side of this resistor is shorted to ground.
However, shorting the output pin directly to the
adjacent positive power supply pin will, in most
cases, destroy the amplifier. Including a small series
resistor (5Ω) in the power-supply line will protect
against this. Always place the 0.1µF decoupling
capacitor directly on the supply pins.
network;
in
the
noninverting
configuration
(Figure 28), this is sum of RF + RG, while in the
inverting configuration, it is only RF. Also, providing
an additional supply decoupling capacitor (0.1µF)
between the supply pins (for bipolar operation)
improves the 2nd-order distortion slightly (3dB to
6dB).
It is also true that increasing the output voltage swing
increases harmonic distortion.
Driving Capacitive Loads
Noise Performance
One of the most demanding and yet very common
load conditions for an op amp is capacitive loading.
Often, the capacitive load is the input of an
The
OPA2652
input-referred
voltage
noise
(8nV/√Hz), and the two input-referred current noise
terms (1.4pA/√Hz), combine to give low output noise
under
Figure 35 shows the op amp noise analysis model
with all the noise terms included. In this model, all
noise terms are taken to be noise voltage or current
density terms in either nV/√Hz or pA/√Hz.
analog-to-digital
(A/D)
converter—including
a wide variety of operating conditions.
additional external capacitance that may be
recommended to improve A/D linearity. A high-speed
amplifier such as the OPA2652 can be very
susceptible to decreased stability and closed-loop
response peaking when a capacitive load is placed
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