output (“full-scale”) are set by the external voltage refer-
ences (VREFL and VREFH, respectively). The digital input is
a 12-bit parallel word and the DAC input registers offer a
readback capability. The converters can be powered from a
single +15V supply or a dual ±15V supply. Each device
offers a reset function which immediately sets all DAC
registers and DAC output voltages to mid-scale (DAC7724,
code 800H) or to zero-scale (DAC7725, code 000H). See
Figures 2 and 3 for the basic operation of the DAC7724/25.
THEORY OF OPERATION
The DAC7724 and DAC7725 are quad voltage output,
12-bit digital-to-analog converters (DACs). The architecture
is a classic R-2R ladder configuration followed by an opera-
tional amplifier that serves as a buffer, as shown in Figure 1.
Each DAC has its own R-2R ladder network and output op-
amp, but all share the reference voltage inputs. The mini-
mum voltage output (“zero-scale”) and maximum voltage
RF
VOUT
R
R
R
R
R
R
R
2R
2R
2R
2R
2R
2R
2R
2R
2R
VREFH
VREFL
FIGURE 1. DAC7724/25 Architecture.
DAC7724
DAC7725
+10.00V
0.1µF
+15V
+
1
2
3
4
5
6
7
8
9
VREFH
VOUTB
VOUTA
VSS
VREFL 28
VOUTC 27
VOUTD 26
VCC 25
VDD 24
CS 23
0V to +10V
0V to +10V
0V to +10V
0V to +10V
0.1µF
0.1µF
1µF to 10µF
+5V
+
GND
RESET
LDAC
DB0
1µF to 10µF
Reset DACs(1)
Chip Select
A0 22
Load DAC Registers
Address Bus
or Decoder
A1 21
DB1
R/W 20
DB11 19
DB10 18
DB9 17
DB8 16
DB7 15
Read/Write
10 DB2
11 DB3
12 DB4
13 DB5
14 DB6
Data Bus
Data Bus
NOTE: (1) Reset LOW sets all DACs to code 800H on the DAC7724 and to code 000H on the DAC7725.
FIGURE 2. Basic Single-Supply Operation of the DAC7724/25.
®
12
DAC7724, 7725
BB [ BURR-BROWN CORPORATION ]
