by the external voltage references (VREFL and VREFH, re-
spectively). The digital input is a 16-bit parallel word and
the DAC input registers offer a readback capability. The
converters can be powered from either a single +5V supply
or a dual ±5V supply. The device offers a reset function
which immediately sets all DAC output voltages and DAC
registers to mid-scale code 8000H or to zero-scale, code
0000H. See Figures 2 and 3 for the basic operation of the
DAC7644.
THEORY OF OPERATION
The DAC7644 is a quad voltage output, 16-bit digital-to-
analog converter (DAC). The architecture is an R-2R ladder
configuration with the three MSB’s segmented followed by
an operational amplifier that serves as a buffer. Each DAC
has its own R-2R ladder network, segmented MSBs and
output op amp (see Figure 1). The minimum voltage output
(zero-scale) and maximum voltage output (full-scale) are set
RF
VOUT Sense
VOUT
R
2R
2R
2R
2R
2R
2R
2R
2R
2R
VREF
VREFH Sense
VREF
H
L
VREFL Sense
FIGURE 1. DAC7644 Architecture.
1
2
3
4
5
6
7
8
9
DB15
NC 48
DB14
DB13
DB12
DB11
DB10
DB9
NC 47
NC 46
NC 45
V
OUTA Sense 44
0V to +2.5V
+2.5000V
VOUT
REFL AB Sense 42
REFL AB 41
REFH AB 40
A
43
V
DB8
V
Data
Bus
DB7
V
10 DB6
11 DB5
12 DB4
13 DB3
14 DB2
15 DB1
16 DB0
17 RSTSEL
18 RST
19 LOADDACS
20 R/W
21 A1
V
REFH AB Sense 39
VOUTB Sense 38
0V to +2.5V
0V to +2.5V
+2.5000V
V
OUTB 37
OUTC Sense 36
OUTC 35
DAC7644
V
V
V
REFH CD Sense 34
VREFH CD 33
V
REFL CD 32
REFL CD Sense 31
OUTD Sense 30
VOUT
29
Reset DACs
Load DAC Registers
READ/WRITE
V
V
0V to +2.5V
D
VSS 28
AGND 27
VCC 26
Address
22 A0
0.1µF
1µF
Chips Select
23 CS
+
+5V
24 DGND
VDD 25
NC = No Connection
FIGURE 2. Basic Single-Supply Operation of the DAC7644.
15
®
DAC7644
BB [ BURR-BROWN CORPORATION ]
